Patents by Inventor Christo Bojkov

Christo Bojkov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240413098
    Abstract: Embodiments of an integrated circuit (IC) structure are disclosed. The IC structure includes a semiconductor substrate having an active region, a contact positioned over the active region, and an Aminated-Polyhydroxy organic (APHO) film that covers the contact. The APHO film prevents moisture from causing shorts and transient currents, thereby allowing high voltages to be applied to the contact.
    Type: Application
    Filed: April 25, 2024
    Publication date: December 12, 2024
    Inventors: Christo Bojkov, Elias Reese, Harold Isom, Vivian Li
  • Publication number: 20240258197
    Abstract: Designs and methods of design of the present disclosure utilize various forms of carbon allotropes to form a carbon allotrope structure such as a graphene foam filling the interior cavity of vias that form part of a semiconductor die. The carbon allotrope structure enables heat generated within a GaN-based device region of the semiconductor die to be dissipated away. In a different embodiment, utilizing other forms of carbon allotropes, a carbon allotrope layer such as graphene layers is formed. The carbon allotrope layer is disposed over a frontside surface of the semiconductor die to provide additional heat dissipation paths for the heat generated within the GaN-based device region. The higher thermal conductivity of the carbon allotrope foam and the carbon allotrope layer allows the heat to be dissipated away from heat-generating semiconductor devices forming part of the device region of the semiconductor die.
    Type: Application
    Filed: January 30, 2023
    Publication date: August 1, 2024
    Inventors: Christo Bojkov, Michael Roberg, Zhi-Qi Li, Harold Isom
  • Patent number: 12002866
    Abstract: RF devices, and more particularly RF devices with photo-imagable polymers for high frequency enhancements and related methods are disclosed. High frequency enhancements are realized by providing air cavities registered with one or more operating portions of RF devices. The air cavities are formed by photo-imagable polymer structures that provide separation from high dielectric constant materials associated with sealing materials, such as overmold materials, that are typically used for environmental and/or mechanical protection in RF devices. Related methods are disclosed that include forming the photo-imagable polymer structures and corresponding air cavities through various lamination and patterning of photo-imagable polymer layers. Further radiation hardening steps are disclosed that may be applied to the photo-imagable polymer structures after air cavities are formed to promote improved structural integrity of the air cavities during subsequent fabrication steps and during operation of the RF devices.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: June 4, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Christo Bojkov, Zhi-Qi Li, Michael Roberg, Harold Isom
  • Patent number: 11929300
    Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: March 12, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka, Christo Bojkov
  • Patent number: 11877505
    Abstract: Semiconductor devices, and more particularly arrangements of fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices are disclosed. Arrangements include conformal coatings or layers of fluorinated polymers that cover a semiconductor die on a package substrate of a semiconductor device. Such fluorinated polymer arrangements may also conformally coat various electrical connections for the semiconductor die, including wire bonds. Fluorinated polymers with low dielectric constants and low moisture permeability may thereby provide reduced moisture ingress in semiconductor devices while also reducing the impact of associated dielectric loss.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: January 16, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Christo Bojkov, Michael Roberg, Matthew Essar, Walid Meliane, Terry Hon
  • Publication number: 20230343662
    Abstract: The present disclosure relates to a semiconductor package with a thermally enhanced molding compound. The disclosed semiconductor package includes a module carrier having an upper surface, a die formed over the upper surface of the module carrier, and a thermally enhanced molding compound component formed over the upper surface of module carrier to encapsulate the die. Herein, the thermally enhanced molding compound is formed from a molding compound mixed with a thermal additive and has no air pockets or voids. The thermal additive includes a number of carbon flakes or a number of carbon spherical particles. The thermal additive has a thermal conductivity larger than 450 W/m·K and an electrical resistivity larger than 90 ??.cm. In one embodiment, the thermal additive includes a number of graphene flakes, a number of graphene particles, a number of graphite flakes, or a number of graphite particles.
    Type: Application
    Filed: April 10, 2023
    Publication date: October 26, 2023
    Inventors: Christo Bojkov, Brian P. Balut, Walid Meliane, Matthew Essar
  • Publication number: 20230207415
    Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.
    Type: Application
    Filed: February 23, 2023
    Publication date: June 29, 2023
    Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka, Christo Bojkov
  • Publication number: 20230178467
    Abstract: A die attach system includes a substrate that has scored grooves or into which stud bumps on a die are then inserted. The additional surface area and flow of the stud bumps into the trenches creates a strong mechanical bond that may withstand repeated thermal cycling. In a further exemplary aspect, the substrate may be covered in a first material, the stud bumps may be made from the same first material, a die attachment material may be made from the same first material, and a bottom layer of the die may be made from the same material. This material homogeneity allows for more uniform expansion and contraction during thermal cycling, preventing failure of the mechanical bond.
    Type: Application
    Filed: March 30, 2022
    Publication date: June 8, 2023
    Inventors: Walid Meliane, Christo Bojkov
  • Patent number: 11626340
    Abstract: An integrated circuit (IC) package with an embedded heat spreader in a redistribution layer (RDL) is provided. IC packaging facilitates a high density package for ICs, including monolithic microwave integrated circuits (MMICs). However, IC packaging may result in reduced heat removal from an IC, decreasing radio frequency (RF) circuit performance. In an exemplary aspect, an IC package is provided which incorporates an embedded heat spreader within a dielectric layer of an RDL coupled to an IC die. The embedded heat spreader provides efficient heat transfer, robust RF performance, and operation through millimeter wave (mmW) frequencies, all in a miniature low-cost, low-profile surface mountable (SM) package.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: April 11, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Kevin J. Anderson, Andrew Arthur Ketterson, Tarak A. Railkar, Deep C. Dumka, Christo Bojkov
  • Publication number: 20230018673
    Abstract: RF devices, and more particularly RF devices with photo-imageable polymers for high frequency enhancements and related methods are disclosed. High frequency enhancements are realized by providing air cavities registered with one or more operating portions of RF devices. The air cavities are formed by photo-imageable polymer structures that provide separation from high dielectric constant materials associated with sealing materials, such as overmold materials, that are typically used for environmental and/or mechanical protection in RF devices. Related methods are disclosed that include forming the photo-imageable polymer structures and corresponding air cavities through various lamination and patterning of photo-imageable polymer layers. Further radiation hardening steps are disclosed that may be applied to the photo-imageable polymer structures after air cavities are formed to promote improved structural integrity of the air cavities during subsequent fabrication steps and during operation of the RF devices.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Inventors: Christo Bojkov, Zhi-Qi Li, Michael Roberg, Harold Isom
  • Publication number: 20220123216
    Abstract: Semiconductor devices, and more particularly arrangements of fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices are disclosed. Arrangements include conformal coatings or layers of fluorinated polymers that cover a semiconductor die on a package substrate of a semiconductor device. Such fluorinated polymer arrangements may also conformally coat various electrical connections for the semiconductor die, including wire bonds. Fluorinated polymers with low dielectric constants and low moisture permeability may thereby provide reduced moisture ingress in semiconductor devices while also reducing the impact of associated dielectric loss.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 21, 2022
    Inventors: Christo Bojkov, Michael Roberg, Matthew Essar, Walid Meliane, Terry Hon
  • Patent number: 10855240
    Abstract: Improved structures for spatial power-combining devices are disclosed. A spatial power-combining device includes a plurality of amplifier assemblies and each amplifier assembly includes a body structure that supports an input antenna structure, an amplifier, and an output antenna structure. According to embodiments disclosed herein, the body structure comprises a material that is configured to provide the spatial power-combining device with reduced weight while maintaining good thermal dissipation for heat generated by the amplifiers. In certain embodiments, the body structure may comprise an allotrope of carbon such as graphite or graphene, among others. In certain embodiments, the body structure may include one or more thermal vias configured to dissipate heat from the amplifier.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: December 1, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christo Bojkov, Dylan Murdock, Robert Charles Dry
  • Patent number: 10832984
    Abstract: A method includes the steps of fabricating one or more semiconductor devices on a semiconductor wafer and depositing one or more conformal organic environmental protection layers over the semiconductor wafer using a vapor deposition process. By depositing the one or more conformal organic environmental protection layers using a vapor deposition process, thin film conformal organic environmental protection layers may be provided that offer excellent protection against water and oxygen ingress, thus increasing the ruggedness and reliability of the resulting semiconductor die.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: November 10, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christo Bojkov, Andrew Ketterson, Robert Charles Dry
  • Publication number: 20200162046
    Abstract: Improved structures for spatial power-combining devices are disclosed. A spatial power-combining device includes a plurality of amplifier assemblies and each amplifier assembly includes a body structure that supports an input antenna structure, an amplifier, and an output antenna structure. According to embodiments disclosed herein, the body structure comprises a material that is configured to provide the spatial power-combining device with reduced weight while maintaining good thermal dissipation for heat generated by the amplifiers. In certain embodiments, the body structure may comprise an allotrope of carbon such as graphite or graphene, among others. In certain embodiments, the body structure may include one or more thermal vias configured to dissipate heat from the amplifier.
    Type: Application
    Filed: November 15, 2018
    Publication date: May 21, 2020
    Inventors: Christo Bojkov, Dylan Murdock, Robert Charles Dry
  • Publication number: 20200152533
    Abstract: A method includes the steps of fabricating one or more semiconductor devices on a semiconductor wafer and depositing one or more conformal organic environmental protection layers over the semiconductor wafer using a vapor deposition process. By depositing the one or more conformal organic environmental protection layers using a vapor deposition process, thin film conformal organic environmental protection layers may be provided that offer excellent protection against water and oxygen ingress, thus increasing the ruggedness and reliability of the resulting semiconductor die.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Inventors: Christo Bojkov, Andrew Ketterson, Robert Charles Dry
  • Patent number: 10651103
    Abstract: A method includes the steps of fabricating one or more semiconductor devices on a semiconductor wafer and depositing one or more conformal organic environmental protection layers over the semiconductor wafer using a vapor deposition process. By depositing the one or more conformal organic environmental protection layers using a vapor deposition process, thin film conformal organic environmental protection layers may be provided that offer excellent protection against water and oxygen ingress, thus increasing the ruggedness and reliability of the resulting semiconductor die.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: May 12, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christo Bojkov, Andrew Ketterson, Robert Charles Dry
  • Patent number: 10615091
    Abstract: A method includes the steps of fabricating one or more semiconductor devices on a semiconductor wafer and depositing one or more conformal organic environmental protection layers over the semiconductor wafer using a vapor deposition process. By depositing the one or more conformal organic environmental protection layers using a vapor deposition process, thin film conformal organic environmental protection layers may be provided that offer excellent protection against water and oxygen ingress, thus increasing the ruggedness and reliability of the resulting semiconductor die.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 7, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christo Bojkov, Andrew Ketterson, Robert Charles Dry
  • Publication number: 20180122716
    Abstract: A method includes the steps of fabricating one or more semiconductor devices on a semiconductor wafer and depositing one or more conformal organic environmental protection layers over the semiconductor wafer using a vapor deposition process. By depositing the one or more conformal organic environmental protection layers using a vapor deposition process, thin film conformal organic environmental protection layers may be provided that offer excellent protection against water and oxygen ingress, thus increasing the ruggedness and reliability of the resulting semiconductor die.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 3, 2018
    Inventors: Christo Bojkov, Andrew Ketterson, Robert Charles Dry
  • Publication number: 20060091541
    Abstract: A semiconductor device including a contact pad and circuit metallization on the surface of an integrated circuit (IC) chip comprises a stack of protection layers over the surface of the chip. The stack consists of a first inorganic layer (303, preferably silicon nitride) on the chip surface, followed by a polymer layer (306, preferably benzocyclobutene) on the first inorganic layer (303), and finally an outermost second inorganic layer (310, preferably silicon dioxide) on the polymer layer (303). A window (301a) in the stack of layers exposes the metallization (301) of the IC. A patterned seed metal layer (307, preferably copper) is on the metallization (301) in the window and on the second inorganic layer (310) around the window. A buffer metal layer (308, preferably copper) is positioned on the seed metal layer (307). A metal reflow element (309) is attached to the buffer metal (308).
    Type: Application
    Filed: December 13, 2005
    Publication date: May 4, 2006
    Inventors: Christo Bojkov, Orlando Torres
  • Publication number: 20050245076
    Abstract: A metal structure (600) for a bonding pad on integrated circuit wafers, which have interconnecting metallization (101) protected by an insulating layer (102) and selectively exposed by windows in the insulating layer. The structure comprises a patterned seed metal layer (104) positioned on the interconnecting metallization exposed by the window so that the seed metal establishes ohmic contact to the metallization as well as a practically impenetrable seal of the interface between the seed metal and the insulating layer. Further, a metal stud (301) is formed on the seed metal and aligned with the window. The metal stud is conformally covered by a barrier metal layer (501) and an outermost bondable metal layer (502).
    Type: Application
    Filed: June 30, 2005
    Publication date: November 3, 2005
    Inventors: Christo Bojkov, Michael Krumnow