Patents by Inventor Christoph Raisch

Christoph Raisch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170373865
    Abstract: A computer system includes a first server including a first data management module and a second server including a second data management module, and a first and second storage controller. The first and second storage controllers are interconnected by a network configured for reliable data multicasting. The computer system further includes a cross system manager for controlling one or more core storage functions on each of the first and second storage controllers. The computer system further includes computer program instructions to, responsive to a core storage function triggered by the cross system manager: Create a multicast group for each of the first server and the second server in the network, wherein the multicast group is created by a reliable multicast mechanism, and Multicast data write operations of each of the first server and the second server to the first storage controller and the second storage controller of the multicast group.
    Type: Application
    Filed: June 22, 2016
    Publication date: December 28, 2017
    Inventors: Alol A. Crasta, Harshal S. Patil, Kishorekumar G. Pillai, Christoph Raisch, Nishant Ranjan
  • Publication number: 20170374146
    Abstract: A computer system includes a first server including a first data management module and a second server including a second data management module, and a first and second storage controller. The first and second storage controllers are interconnected by a network configured for reliable data multicasting. The computer system further includes a cross system manager for controlling one or more core storage functions on each of the first and second storage controllers. The computer system further includes computer program instructions to, responsive to a core storage function triggered by the cross system manager: Create a multicast group for each of the first server and the second server in the network, wherein the multicast group is created by a reliable multicast mechanism, and Multicast data write operations of each of the first server and the second server to the first storage controller and the second storage controller of the multicast group.
    Type: Application
    Filed: January 24, 2017
    Publication date: December 28, 2017
    Inventors: Alol A. Crasta, Harshal S. Patil, Kishorekumar G. Pillai, Christoph Raisch, Nishant Ranjan
  • Patent number: 9785597
    Abstract: A data processing system includes a main storage, an input/output memory management unit (IOMMU) coupled to the main storage, a peripheral component interconnect (PCI) device coupled to the IOMMU, and a mapper. The system is configured to allocate an amount of physical memory in the main storage and the IOMMU is configured to provide access to the main storage and to map a PCI address from the PCI device to a physical memory address within the main storage. The mapper is configured to perform a mapping between the allocated amount of physical memory of the main storage and a contiguous PCI address space. The IOMMU is further configured to translate PCI addresses of the contiguous PCI address space to the physical memory address within the main storage.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: October 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Gerd Bayer, Hannes Hering, Hoang-Nam Nguyen, Christoph Raisch, Jan-Bernd Themann
  • Patent number: 9774546
    Abstract: Method to perform an operation comprising, receiving a login request from an endpoint connected to first physical port of a first switch module of a distributed network switch, wherein the distributed network switch comprises a plurality of switch modules, wherein each switch module comprises a plurality of ASICs, responsive to the login request, storing, in a FCDF database, an entry comprising an identifier of the first physical port and a unique identifier of the endpoint, and responsive to receiving, from a cFCF, a zoning update comprising the unique identifier of the endpoint and an FCID for the endpoint, storing the FCID in the FCDF database entry for the endpoint, identifying a first ASIC, of the plurality of ASICs of the first switch module, connected to the first physical port, and updating a zoning table of the first ASIC to include the zoning update.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: September 26, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joachim Fenkes, Henry J. May, Christoph Raisch, Stefan Roscher, Alexander Schmidt, Daniel Sentler
  • Patent number: 9769175
    Abstract: Accessing privileged objects in a server environment. A privileged object is associated with an application comprising at least one process resource and a corresponding semi-privileged instruction. The association is filed in an entity of an operating system kernel. A central processing unit (CPU) performs an authorization check if the semi-privileged instruction is issued and attempts to access the privileged object. The CPU executes the semi-privileged instruction and grants access to the privileged object if the operating system kernel has issued the semi-privileged instruction; or accesses the entity if a process resource of the application has issued the semi-privileged instruction to determine authorization of the process resource to access the privileged object.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: September 19, 2017
    Assignee: International Business Machines Corporation
    Inventors: Utz Bacher, Frank Blaschka, Einar Lueck, Christoph Raisch
  • Patent number: 9734088
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: August 15, 2017
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Patent number: 9734089
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: August 15, 2017
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Publication number: 20170228163
    Abstract: Aspects include defining a first percentage of storage areas in an array of multiple persistent storage elements as hot storage areas and a second percentage of storage areas as spare storage areas such that remaining storage areas define a third percentage as cold storage areas. Each of the storage areas are assigned to either the hot group, the spare group or the cold group, respectively. A hot and cold storage area each include a first storage block on two different storage elements, and the hot storage area and the cold storage area each include a corresponding second storage block on a storage element different to the storage element on which the first respective storage block is stored. The storage blocks are distributed across the storage elements such that blocks of storage areas with the highest write rate of all storage areas are placed on a hottest storage element.
    Type: Application
    Filed: June 7, 2016
    Publication date: August 10, 2017
    Inventors: MARCO KRAEMER, CARSTEN OTTE, CHRISTOPH RAISCH
  • Publication number: 20170228158
    Abstract: Aspects include defining a first percentage of storage areas in an array of multiple persistent storage elements as hot storage areas and a second percentage of storage areas as spare storage areas such that remaining storage areas define a third percentage as cold storage areas. Each of the storage areas are assigned to either the hot group, the spare group or the cold group, respectively. A hot and cold storage area each include a first storage block on two different storage elements, and the hot storage area and the cold storage area each include a corresponding second storage block on a storage element different to the storage element on which the first respective storage block is stored. The storage blocks are distributed across the storage elements such that blocks of storage areas with the highest write rate of all storage areas are placed on a hottest storage element.
    Type: Application
    Filed: February 8, 2016
    Publication date: August 10, 2017
    Inventors: Marco Kraemer, Carsten Otte, Christoph Raisch
  • Publication number: 20170208149
    Abstract: Aspects include creating a network multicast group in a storage area network (SAN) for a first computer system and a second computer system that are connected by the SAN and that each include a local cache for a shared storage device. Prior to one of the first or second computer system writing write data to the shared storage device: the write data is written to the local cache of the one of the first or second computer system; the write data is sent to the multicast group; based on the send operation completing, the write data is written to the shared storage device; and based on the write operation completing, the write completion is signaled to an operating system or hypervisor of the first and second computer systems.
    Type: Application
    Filed: January 20, 2016
    Publication date: July 20, 2017
    Inventors: Alol Antony Crasta, Harshal S. Patil, Kishorekumar G. Pillai, Christoph Raisch, Nishant Ranjan
  • Publication number: 20170206162
    Abstract: Aspects include creating a network multicast group in a storage area network (SAN) for a first computer system and a second computer system that are connected by the SAN and that each include a local cache for a shared storage device. Prior to one of the first or second computer system writing write data to the shared storage device: the write data is written to the local cache of the one of the first or second computer system; the write data is sent to the multicast group; based on the send operation completing, the write data is written to the shared storage device; and based on the write operation completing, the write completion is signaled to an operating system or hypervisor of the first and second computer systems.
    Type: Application
    Filed: June 10, 2016
    Publication date: July 20, 2017
    Inventors: Alol Antony Crasta, Harshal S. Patil, Kishorekumar G. Pillai, Christoph Raisch, Nishant Ranjan
  • Publication number: 20170139840
    Abstract: In an approach for determining a physical address for object access in an object-based storage device (OSD) system, a processor divides a first data object into one or more partitions, including at least a first partition, and providing each partition for storage as individual stored objects in an OSD system. A processor adds a first entry in a page table, the first entry representing the first partition without an indication of a physical address. A memory management unit (MMU) of the OSD system receives a first request of the first partition. Responsive to receiving the first request of the first partition, a MMU identifies that the first entry of the page table represents the first partition. A MMU obtains a physical address of the first partition from one of a hardware component and a firmware component.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 18, 2017
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Publication number: 20170139636
    Abstract: In an approach for determining a physical address for object access in an object-based storage device (OSD) system, a processor divides a first data object into one or more partitions, including at least a first partition, and providing each partition for storage as individual stored objects in an OSD system. A processor adds a first entry in a page table, the first entry representing the first partition without an indication of a physical address. A memory management unit (MMU) of the OSD system receives a first request of the first partition. Responsive to receiving the first request of the first partition, a MMU identifies that the first entry of the page table represents the first partition. A MMU obtains a physical address of the first partition from one of a hardware component and a firmware component.
    Type: Application
    Filed: April 5, 2016
    Publication date: May 18, 2017
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Patent number: 9641455
    Abstract: Provided are a method, a system, and a computer program product in which a plurality of switches are maintained in a cascaded configuration. A switch relays a switch fabric internal link services (SW-ILS) to generate a pair of exchanges comprising a first exchange and a second exchange at the switch. In response to a termination of the first exchange of the pair of exchanges, the second exchange of the pair of exchanges is terminated.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: May 2, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Patricia G. Driever, Roger G. Hathorn, Henry J. May, Christoph Raisch, Daniel Sentler
  • Patent number: 9596076
    Abstract: Aspects include encrypting data exchanged between two computer systems. A method includes accessing content of a memory, via a memory address, by at least one processing unit of one of the computer systems. Based on the accessing being a write operation, the content of the memory is encrypted using a memory encryption key, the encrypting is by a crypto unit of the at least one of the processing units. Based on the accessing being a read operation, the content of the memory is decrypted using the same memory encryption key, the decrypting is by a crypto unit of the at least once of the processing units. Remote direct memory access is established via memory addresses between the computer systems, the establishing including at least one of the computer systems locally storing a respective network encryption key as memory encryption keys for memory areas used for the data exchange.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: March 14, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christine Axnix, Ute Gaertner, Jakob C. Lang, Angel Nunez Mencias, Christoph Raisch, Christopher S. Smith
  • Publication number: 20170046277
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Application
    Filed: November 2, 2015
    Publication date: February 16, 2017
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Publication number: 20170046276
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Application
    Filed: August 12, 2015
    Publication date: February 16, 2017
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Patent number: 9515964
    Abstract: Techniques are provided for synchronizing, in a distributed Fiber Channel fabric or a distributed FCoE fabric in which FC frames are encapsulated in Ethernet frames, a controlling FCoE forwarder (cFCF) with the FCoE data-plane forwarder (FDF). The operation includes entering a recovery mode at the FDF. The FDF is modified based on a route distribution message provided by the cFCF which includes fabric-provided MAC addresses (FPMAs). The FDF notifies the cFCF of differences between the FPMAs supplied by the route distribution message with the FPMAs known by the FDF. The FDF leaves the recovery mode and sends an acknowledgement to the cFCF.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Henry J. May, Christoph Raisch, Stefan Roscher, Daniel Sentler, Bharath B. Somayaji, Sudheer R. Yelanduru
  • Publication number: 20160323205
    Abstract: Techniques are provided for synchronizing, in a distributed Fibre Channel fabric or a distributed FCoE fabric in which FC frames are encapsulated in Ethernet frames, a controlling FCoE forwarder (cFCF) with the FCoE data-plane forwarder (FDF). The operation includes entering a recovery mode at the FDF. The FDF is modified based on a route distribution message provided by the cFCF which includes fabric-provided MAC addresses (FPMAs). The FDF notifies the cFCF of differences between the FPMAs supplied by the route distribution message with the FPMAs known by the FDF. The FDF leaves the recovery mode and sends an acknowledgement to the cFCF.
    Type: Application
    Filed: July 14, 2016
    Publication date: November 3, 2016
    Inventors: Henry J. MAY, Christoph RAISCH, Stefan ROSCHER, Daniel SENTLER, Bharath B. SOMAYAJI, Sudheer R. YELANDURU
  • Patent number: 9467389
    Abstract: A switch unit has one frame buffer pool for storing received frames and another frame buffer pool for storing large frames. The frame size in the large frame buffer pool may be optimized to the largest amount of data the switch unit that an FCoE switching is running on can support (i.e., a limitation of zone entries). Should free space be unavailable in the large frame buffer pool, or if a sequence grows bigger than can be supported, the switch unit may still continue to send response frames back to the sender. While the switch unit may store header information of the frame, the switch unit does not store the data of subsequent frames any longer. Once the sequence has been received completely, a rejection message is sent back with an appropriate error or reason code. The rejection message enables the sender to attempt a retransmission or cancel the current request altogether.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: October 11, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christoph Raisch, Stefan Roscher, Alexander Schmidt, Daniel Sentler