Patents by Inventor Christoph Weiss

Christoph Weiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190165151
    Abstract: An embodiment relates to a method of manufacturing an insulated gate bipolar transistor in a semiconductor body. A first field stop zone portion of a first conductivity type is formed on a semiconductor substrate. A second field stop zone portion of the first conductivity type is formed on the first field stop zone portion. A drift zone of the first conductivity type is formed on the second field stop zone portion. A doping concentration in the drift zone is smaller than 1013 cm?3 along a vertical extension of more than 30% of a thickness of the semiconductor body upon completion of the insulated gate bipolar transistor.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 30, 2019
    Inventors: Oana Julia Spulber, Matthias Kuenle, Wolfgang Roesner, Christian Philipp Sandow, Christoph Weiss
  • Publication number: 20190157401
    Abstract: A method of manufacturing a power semiconductor device includes: creating a doped contact region on top of a surface of a carrier; creating, on top of the contact region, a doped transition region having a maximum dopant concentration of at least 0.5*1015 cm?3 for at least 70% of a total extension of the doped transition region in an extension direction and a maximal dopant concentration gradient of at most 3*1022 cm?4, wherein a lower subregion of the doped transition region is in contact with the contact region and has a maximum dopant concentration at least 100 times higher than a maximum dopant concentration of an upper subregion of the doped transition region; and creating a doped drift region on top of the upper subregion of the doped transition region, the doped drift region having a lower dopant concentration than the upper subregion of the doped transition region.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 23, 2019
    Inventors: Matthias Kuenle, Daniel Schloegl, Hans-Joachim Schulze, Christoph Weiss
  • Patent number: 10243066
    Abstract: A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn).
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: March 26, 2019
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Daniel Schloegl, Johannes Baumgartl, Matthias Kuenle, Erwin Lercher, Hans-Joachim Schulze, Christoph Weiss
  • Patent number: 10186587
    Abstract: A power semiconductor device has a semiconductor body configured to conduct a load current in parallel to an extension direction between first and second load terminals of the power semiconductor device. The semiconductor body includes a doped contact region electrically connected to the second load terminal, a doped drift region having a dopant concentration that is smaller than a dopant concentration of the contact region, and an epitaxially grown doped transition region separated from the second load terminal by the contact region and that couples the contact region to the drift region. An upper subregion of the transition region is in contact with the drift region, and a lower subregion of the transition region is in contact with the contact region. The transition region has a dopant concentration of at least 0.5*1015 cm?3 for at least 5% of the total extension of the transition region in the extension direction.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: January 22, 2019
    Assignee: Infineon Technologies AG
    Inventors: Matthias Kuenle, Daniel Schloegl, Hans-Joachim Schulze, Christoph Weiss
  • Publication number: 20170373157
    Abstract: A power semiconductor device has a semiconductor body configured to conduct a load current in parallel to an extension direction between first and second load terminals of the power semiconductor device. The semiconductor body includes a doped contact region electrically connected to the second load terminal, a doped drift region having a dopant concentration that is smaller than a dopant concentration of the contact region, and an epitaxially grown doped transition region separated from the second load terminal by the contact region and that couples the contact region to the drift region. An upper subregion of the transition region is in contact with the drift region, and a lower subregion of the transition region is in contact with the contact region. The transition region has a dopant concentration of at least 0.5*1015 cm?3 for at least 5% of the total extension of the transition region in the extension direction.
    Type: Application
    Filed: June 27, 2017
    Publication date: December 28, 2017
    Inventors: Matthias Kuenle, Daniel Schloegl, Hans-Joachim Schulze, Christoph Weiss
  • Patent number: 9825136
    Abstract: A semiconductor component includes an element composed of a conductive material, which is arranged above a surface of a semiconductor substrate. The element includes an element region not adjoined by any electrical contacts to an overlying or underlying electrically conductive plane. In this case, a surface of the element facing away from the semiconductor substrate is patterned with elevations or depressions and a surface of the element region facing the semiconductor substrate is patterned to a lesser extent or is not patterned.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: November 21, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Josef Niedernostheide, Manfred Pfaffenlehner, Frank Dieter Pfirsch, Hans-Joachim Schulze, Holger Schulze, Christoph Weiss
  • Publication number: 20170243963
    Abstract: A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn).
    Type: Application
    Filed: May 8, 2017
    Publication date: August 24, 2017
    Applicant: Infineon Technologies AG
    Inventors: Daniel Schloegl, Johannes Baumgartl, Matthias Kuenle, Erwin Lercher, Hans-Joachim Schulze, Christoph Weiss
  • Patent number: 9685504
    Abstract: A semiconductor device includes a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: June 20, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Haertl, Frank Hille, Francisco Javier Santos Rodriguez, Daniel Schloegl, Andre Rainer Stegner, Christoph Weiss
  • Patent number: 9647083
    Abstract: A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn).
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: May 9, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Daniel Schloegl, Johannes Baumgartl, Matthias Kuenle, Erwin Lercher, Hans-Joachim Schulze, Christoph Weiss
  • Publication number: 20160372539
    Abstract: A semiconductor device includes a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.
    Type: Application
    Filed: August 31, 2016
    Publication date: December 22, 2016
    Inventors: Andreas Haertl, Frank Hille, Francisco Javier Santos Rodriguez, Daniel Schloegl, Andre Rainer Stegner, Christoph Weiss
  • Publication number: 20160322472
    Abstract: A method of producing a semiconductor device is presented. The method comprises: providing a semiconductor substrate having a surface; epitaxially growing, along a vertical direction (Z) perpendicular to the surface, a back side emitter layer on top of the surface, wherein the back side emitter layer has dopants of a first conductivity type or dopants of a second conductivity type complementary to the first conductivity type; epitaxially growing, along the vertical direction (Z), a drift layer having dopants of the first conductivity type above the back side emitter layer, wherein a dopant concentration of the back side emitter layer is higher than a dopant concentration of the drift layer; and creating, either within or on top of the drift layer, a body region having dopants of the second conductivity type, a transition between the body region and the drift layer forming a pn-junction (Zpn).
    Type: Application
    Filed: April 29, 2016
    Publication date: November 3, 2016
    Inventors: Daniel Schloegl, Johannes Baumgartl, Matthias Kuenle, Erwin Lercher, Hans-Joachim Schulze, Christoph Weiss
  • Patent number: 9443971
    Abstract: A semiconductor device includes a diffusion barrier layer, a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region in contact with the diffusion barrier layer, the contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing the lifetime and/or the mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: September 13, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Haertl, Frank Hille, Francisco Javier Santos Rodriguez, Daniel Schloegl, Andre Rainer Stegner, Christoph Weiss
  • Publication number: 20160141406
    Abstract: A semiconductor device includes a diffusion barrier layer, a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region in contact with the diffusion barrier layer, the contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing the lifetime and/or the mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 19, 2016
    Inventors: Andreas Haertl, Frank Hille, Francisco Javier Santos Rodriguez, Daniel Schloegl, Andre Rainer Stegner, Christoph Weiss
  • Publication number: 20150303260
    Abstract: A semiconductor body includes first and second opposing surfaces, an edge extending in a vertical direction substantially perpendicular to the first surface, an active area, a peripheral area arranged in a horizontal direction substantially parallel to the first surface between the active area and edge, and a pn-junction extending from the active area into the peripheral area. In the peripheral area the semiconductor device further includes a first conductive region arranged next to the first surface, a second conductive region arranged next to the first surface, and arranged in the horizontal direction between the first conductive region and edge, and a passivation structure including a first portion at least partly covering the first conductive region, a second portion at least partly covering the second conductive region. The first portion has a different layer composition than the second portion and/or a thickness which differs from the thickness of the second portion.
    Type: Application
    Filed: April 6, 2015
    Publication date: October 22, 2015
    Inventors: Franz Josef Niedernostheide, Manfred Pfaffenlehner, Hans-Joachim Schulze, Holger Schulze, Frank Umbach, Christoph Weiss
  • Publication number: 20150263106
    Abstract: A semiconductor component includes an element composed of a conductive material, which is arranged above a surface of a semiconductor substrate. The element includes an element region not adjoined by any electrical contacts to an overlying or underlying electrically conductive plane. In this case, a surface of the element facing away from the semiconductor substrate is patterned with elevations or depressions and a surface of the element region facing the semiconductor substrate is patterned to a lesser extent or is not patterned.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Inventors: Franz Josef Niedernostheide, Manfred Pfaffenlehner, Frank Dieter Pfirsch, Hans-Joachim Schulze, Holger Schulze, Christoph Weiss
  • Publication number: 20120283294
    Abstract: The invention relates to a new co-crystal of 4-{[(6-chloropyrid-3-yl)methyl](2,2-difluoroethyl)amino} furan-2(5H)-one with benzoic acid, to processes for the preparation thereof and use thereof.
    Type: Application
    Filed: October 26, 2010
    Publication date: November 8, 2012
    Applicant: BAYER TECHNOLOGY SERVICES GMBH
    Inventors: Martin Weiss, Dirk Storch, Wolfgang Wirth, Britta Olenik, Hans-Christoph Weiss, Ulrich Schwiedop
  • Publication number: 20120270904
    Abstract: The invention relates to a new co-crystal of 4-{[(6-chloropyrid-3-yl)methyl](2,2-difluoroethyl)amino}furan-2(5H)-one with oxalic acid, and also to processes for preparation thereof and use.
    Type: Application
    Filed: October 26, 2010
    Publication date: October 25, 2012
    Applicant: BAYER TECHNOLOGY SERVICES GMBH
    Inventors: Martin Weiss, Dirk Storch, Wolfgang Wirth, Britta Olenik, Ulrich Schwiedop, Hans-Christoph Weiss
  • Publication number: 20120252766
    Abstract: The invention relates to a new co-crystal of 4-{[(6-chloropyrid-3-yl)methyl](2,2-difluoroethyl)amino}furan-2(5H)-one (I) with salicylic acid, and also to processes for preparation thereof and use thereof.
    Type: Application
    Filed: October 26, 2010
    Publication date: October 4, 2012
    Applicant: BAYER ITECHNOLOGY SERVICES GMBH
    Inventors: Martin Weiss, Dirk Storch, Wolfgang Wirth, Britta Olenik, Hans-Christoph Weiss, Ulrich Schwiedop
  • Patent number: 7521665
    Abstract: In order to be able to reliably detect when an object is caught between two parts which move in relation to one another in a motor-driven closing mechanism, in particular in an electromotively driven window winder system, provision is made for the sensor system to have an optical pressure sensor as well as an electrical capacitive sensor in addition. The optical pressure sensor comprises a light-guiding element, a light source for injecting light into the light-guiding element and a light sensor for sensing the light which has been output. The electrical sensor comprises an electrode which is connected to a voltage source. Both sensors are each assigned to an evaluation unit for evaluating the respective signal.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: April 21, 2009
    Assignees: LEONI AG, GECOM Corporation
    Inventors: Gerhard Reichinger, Georg Kodl, Michael Frommberger, Christoph Weiss, Keith Vosburgh, Masaaki Yuge
  • Publication number: 20090026643
    Abstract: The invention relates to a method (100, 200, 300) for producing a dental prosthesis (17) comprising a framework (3) and a veneer (15), in particular for creating a crown, a bridge, an inlay or an onlay. The invention also relates to a system (40, 50) for creating a dental prosthesis (17) comprising a framework (3) and a veneer (15) as well as a corresponding computer program.
    Type: Application
    Filed: November 20, 2006
    Publication date: January 29, 2009
    Applicant: BEGO Bremer Goldschlagerei Wilh. Herbst GmbH & Co.
    Inventors: Thomas Wiest, Christoph Weiss, Stephan Dierkes, Helmut Laschutza