Abstract: A system and method for sending and receiving emergency announcements from a server to a client device are disclosed. The announcements can be sent based on the location of the client device and/or a designated time window. An announcement manager on the client device can display, store and manage the received announcements and activate additional applications based on the content of the emergency announcement.

Abstract: A method and apparatus for processing or compressing an n-dimensional digital signal by constructing a sparse rep resentation which takes advantage of the signal geometrical regularity. The invention comprises a warped wavelet packet transform which performs a cascade of warped subband filtering along wraping grids of sampling points adapted to the signal geometry. It also comprises a bandeletisation which decorrelates the warped wavelet packet coefficients to produce a sparse representation. An inverse warped wavelet packet transform and an inverse bandeletisation reconstruct a signal from its bandelet representation. The invention comprises a compression system which quantizes and codes the bandelet representation, a decompression system, a restoration system which enhances a signal by filtering its bandelet representation, and a feature vector extraction system for pattern recognition applications of a bandelet representation.

Abstract: An electronic circuit comprises a substrate (100), a capacitor (11) and at least one semiconductor component (10) which are supported by a surface (S) of the substrate. A substantially plane screen (12), parallel to the surface of the substrate and made of metallic material, is furthermore placed between the capacitor and the semiconductor component. Preferably, the semiconductor component is placed in proximity to the surface (S) of the substrate and several superposed layers (1-6) of insulating material cover the surface of the substrate and the semiconductor component. The capacitor is then placed within at least one layer (5) of insulating material above the semiconductor component, and the screen (12) is placed within an intermediate layer (4) of insulating material between the layer incorporating the capacitor and the surface (S) of the substrate.

Abstract: A voltage regulator having an output terminal adapted to being connected to a load, including an operational amplifier having its non-inverting input connected to a reference voltage, and its inverting input connected to the output terminal, an inverting amplifier having its input connected to the output of the operational amplifier, a capacitive impedance connected between the input and the output of the inverting amplifier, a power switch controlled by the output of the inverter amplifier, arranged to connect the output terminal to a first supply voltage, said capacitive impedance including a short-circuitable portion associated with active short-circuit means when the current flowing through the load is greater than a predetermined current.

Abstract: A voltage regulator having an output terminal adapted to being connected to a load, including an operational amplifier having its non-inverting input connected to a first reference voltage, and its inverting input connected to the output terminal, an inverting stage having its input connected to the output of the operational amplifier, a power switch controlled by the output of the inverter stage, arranged between the output terminal and a supply voltage, and a charge capacitor arranged between the output terminal and a reference supply voltage, including a means for reducing the effective output impedance of the operational amplifier.

Abstract: A linear regulator having an output stage including first and second P-channel MOS transistors series connected between a first D.C. supply terminal and an output terminal providing a regulated output voltage, and a circuit for controlling the first and second transistors capable of providing the first and second transistors with first and second control signals according to the output voltage and to the voltage at the midpoint of the series connection.

Abstract: A ramp capacitor CAP1 has a first terminal connected to a power supply voltage VBAT. A generator circuit is connected to a second terminal of the ramp capacitor and adapted to generate a voltage ramp at the terminals of the ramp capacitor. The generator circuit includes a constant current source SCC connected to the second terminal B12 of the ramp capacitor CAP1 and auxiliary circuit MAX adapted in the presence of a transient variation of the power supply voltage to determine the transient current flowing in the ramp capacitor and generated by the transient variation. Responsive thereto, delivery is made to the second terminal B12 of the ramp capacitor CAP1 of a charging current equal to the algebraic sum of the constant current delivered by the constant current source and an auxiliary current equal and opposite to the transient current.

Abstract: A voltage regulator having an output terminal adapted to being connected to a load, including a device for limiting the current flowing through the load to a first threshold current if the voltage of the output terminal is lower than a threshold voltage, and to a second current threshold higher than the first current threshold if the voltage of the output terminal is greater than the threshold voltage.

Abstract: A Digital Subscriber Line [DSL] or Very High Speed Digital Subscriber Line [VDSL] telecommunication device with a downstream path and an upstream path, each path comprising a plurality of processors interconnected with a plurality of memories. The processors and the memories are arranged as input/output border column and row of an interconnecting matrix architecture constituted by interconnection devices able to interconnect the processors of the column with the memories of the row. This arrangement allows mapping different architectures simply by changing the status of the interconnection devices. The matrix arrangement provides a very flexible simulation platform for different possible applications and, even when implemented on silicon, the ASIC has a maximum of flexibility and can be adapted to different standard.

Abstract: An integrated modem circuits comprising processor-systems (1) and hardware (2,3) for exchanging signals with another modem circuit 1 Mb/s or more are provided with low cost, accurate, flexible filter software (11) for embodying a digital phase locked loop filter. Said hardware (2,3) comprises fast modules (22,32) for compensating for sample processing. The insight of hardware phase locked loops being expensive, not accurate, inflexible and of software phase locked loops being slow results in the basic idea of the phase locked loop calculations being done in software and the compensations being done in hardware. Sample software (14,15) processes samples (shifting-adding-deleting). Said hardware (2,3) comprises in the transmission path (2) mappers (21), rotors (22) and inverse Fourier transformators (23) and in the receiving path (3) Fourier transformators (33), rotors (32) and demappers (31). Control software (12,13) controls said rotors (22,32).

Abstract: A voltage regulator having an output terminal adapted to being connected to a load, including an operational amplifier having its non-inverting input connected to a first reference voltage, and its inverting input connected to the output terminal, an inverting stage having its input connected to the output of the operational amplifier, a power switch controlled by the output of the inverter stage, arranged between the output terminal and a supply voltage, and a charge capacitor arranged between the output terminal and a reference supply voltage, including a means for reducing the effective output impedance of the operational amplifier.

Abstract: A linear regulator having an output stage including first and second P-channel MOS transistors series connected between a first D.C. supply terminal and an output terminal providing a regulated output voltage, and a circuit for controlling the first and second transistors capable of providing the first and second transistors with first and second control signals according to the output voltage and to the voltage at the midpoint of the series connection.

Abstract: A voltage regulator having an output terminal provided for being connected to a load, including an amplifier having its inverting input connected to a reference voltage, and its non-inverting input connected to the output terminal, a charge capacitor arranged between the output terminal and a first supply voltage, first and second voltage-controlled switches each arranged to connect a second supply voltage and the output terminal, and a control means adapted to providing a voltage depending on the output voltage of the amplifier, on the one hand, to the gate of the first switch and, on the other hand, when the current flowing through the first switch reaches a predetermined threshold, to the gate of the second switch.

Abstract: A ramp capacitor CAP1 has a first terminal connected to a power supply voltage VBAT. A generator circuit is connected to a second terminal of the ramp capacitor and adapted to generate a voltage ramp at the terminals of the ramp capacitor. The generator circuit includes a constant current source SCC connected to the second terminal B12 of the ramp capacitor CAP1 and auxiliary circuit MAX adapted in the presence of a transient variation of the power supply voltage to determine the transient current flowing in said ramp capacitor and generated by said transient variation. Responsive thereto, delivery is made to the second terminal B12 of the ramp capacitor CAP1 of a charging current equal to the algebraic sum of the constant current delivered by the constant current source and an auxiliary current equal and opposite to the transient current.

Abstract: The invention concerns a method for compressing data, in particular images, by transform, in which method this data is projected onto a base of localized orthogonal or biorthogonal functions, such as wavelets.

Abstract: A PCSB assembly including a PCSB; a plurality LVD SCSI bus signal traces formed in the PCSB; and a LVD SCSI direct connector mounted on the PCSB and electrically connected to the plurality of traces.

Abstract: A voltage regulator having an output terminal adapted to being connected to a load, including a device for limiting the current flowing through the load to a first threshold current if the voltage of the output terminal is lower than a threshold voltage, and to a second current threshold higher than the first current threshold if the voltage of the output terminal is greater than the threshold voltage.

Abstract: A voltage regulator having an output terminal provided for being connected to a load, including an amplifier having its inverting input connected to a reference voltage, and its non-inverting input connected to the output terminal, a charge capacitor arranged between the output terminal and a first supply voltage, first and second voltage-controlled switches each arranged to connect a second supply voltage and the output terminal, and a control means adapted to providing a voltage depending on the output voltage of the amplifier, on the one hand, to the gate of the first switch and, on the other hand, when the current flowing through the first switch reaches a predetermined threshold, to the gate of the second switch.

Abstract: A PCSB assembly including a PCSB; a plurality LVD SCSI bus signal traces formed in the PCSB; and a LVD SCSI direct connector mounted on the PCSB and electrically connected to the plurality of traces.

Abstract: The invention provides a turbomachine including a device for supplying pressurized gas, the gas being bled from the compressor of the turbomachine via a bleed orifice and cooled in a cooling cavity disposed within the compressor rotor upstream of the bleed orifice. This arrangement has the effect of cooling the bled gas by heat transfer through the outer wall of the compressor rotor to the gas stream which is being compressed by the compressor upstream of the bleed orifice, and has the result of reducing the drop in the performance of the compressor as a result of the gas being bled off.