Patents by Inventor Christophe Couderc

Christophe Couderc has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for preparing surfaces
    Patent number: 9527108
    Abstract: The invention relates to a surface preparation method using a combination of at least two polymers, which are the same or different, which are grafted hierarchically or multiply on a surface, and also to the use of this preparation method, more particularly in applications for controlling the surface energy of a substrate. The invention may allow a block polymer to be structured with a minimum of defects.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: December 27, 2016
    Assignees: ARKEMA FRANCE, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Christophe Navarro, Stéphanie Magnet, Xavier Chevalier, Raluca Tiron, Christophe Couderc
  • METHOD FOR PREPARING SURFACES
    Publication number: 20140370198
    Abstract: The invention relates to a surface preparation method using a combination of at least two polymers, which are the same or different, which are grafted hierarchically or multiply on a surface, and also to the use of this preparation method, more particularly in applications for controlling the surface energy of a substrate. The invention may allow a block polymer to be structured with a minimum of defects.
    Type: Application
    Filed: December 5, 2012
    Publication date: December 18, 2014
    Inventors: Christophe Navarro, Stéphanie Magnet, Xavier Chevalier, Raluca Tiron, Christophe Couderc
  • Method and apparatus for designing and integrated circuit
    Patent number: 8175737
    Abstract: Method and apparatus for designing an integrated circuit by adding a plurality of control points to an integrated circuit wafer design. Each control point has at least one attribute. Then, an integrated circuit wafer is manufactured using the integrated circuit wafer design. A defect on the integrated circuit wafer is then located. The control points are adjusted such that they correspond with the defect.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: May 8, 2012
    Assignees: Freescale Semiconductor, Inc., Koninklijke Philips Electronics N.V.
    Inventors: Kevin Dean Lucas, Robert Elliott Boone, James Edward Vasek, William Louis Wilkinson, Christophe Couderc
  • Printing of design features using alternating PSM technology with double mask exposure strategy
    Patent number: 7615318
    Abstract: For cases where one edge of a design feature is to be printed through a shifter mask and another one is to be printed through a binary trim mask, and where no upsizing can be performed due to the local density of the design, it is proposed to add shifters with respect to the shifter mask in such a way that all the edges are printed by the phase shift mask.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: November 10, 2009
    Assignees: Freescale Semiconductor Inc., STMicroelectronics (Crolles 2) SAS
    Inventors: Kyle Patterson, Yves Rody, Christophe Couderc, Corinne Miramond-Collet
  • METHOD AND APPARATUS FOR DESIGNING AND INTEGRATED CIRCUIT
    Publication number: 20090240364
    Abstract: Method and apparatus for designing an integrated circuit by adding a plurality of control points to an integrated circuit wafer design. Each control point has at least one attribute. Then, an integrated circuit wafer is manufactured using the integrated circuit wafer design. A defect on the integrated circuit wafer is then located. The control points are adjusted such that they correspond with the defect.
    Type: Application
    Filed: July 19, 2006
    Publication date: September 24, 2009
    Inventors: Kevin Dean Lucas, Robert Elliott Boone, James Edward Vasek, William Louis Wilkinson, Christophe Couderc
  • Printing of design features using alternating PSM technology with double mask exposure strategy
    Publication number: 20060188792
    Abstract: For cases where one edge of a design feature is to be printed through a shifter mask and another one is to be printed through a binary trim mask, and where no upsizing can be performed due to the local density of the design, it is proposed to add shifters with respect to the shifter mask in such a way that all the edges are printed by the phase shift mask.
    Type: Application
    Filed: October 18, 2005
    Publication date: August 24, 2006
    Applicants: Freescale Semiconductor Inc., STMicroelectronics (Crolles 2) SAS
    Inventors: Kyle Patterson, Yves Rody, Christophe Couderc, Corinne Miramond-Collet