Patents by Inventor Christophe F. Pomarede
Christophe F. Pomarede has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7964513Abstract: Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. A silicon nitride layer is then formed by nitriding the silicon layer. By repeating these steps, a silicon nitride layer of a desired thickness is formed.Type: GrantFiled: August 24, 2009Date of Patent: June 21, 2011Assignee: ASM America, Inc.Inventors: Michael A. Todd, Keith D. Weeks, Christiaan J. Werkhoven, Christophe F. Pomarede
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Patent number: 7790556Abstract: Methods are provided herein for forming electrode layers over high dielectric constant (“high k”) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is protected from reduction during a subsequent deposition of silicon-containing gate electrode. In particular, a seed deposition phase includes conditions designed for minimizing hydrogen reduction of the gate dielectric, including low hydrogen content, low temperatures and/or low partial pressures of the silicon source gas. Conditions are preferably changed for higher deposition rates and deposition continues in a bulk phase. Desirably, though, hydrogen diffusion is still minimized by controlling the above-noted parameters. In one embodiment, high k dielectric reduction is minimized through omission of a hydrogen carrier gas. In another embodiment, higher order silanes, aid in reducing hydrogen content for a given deposition rate.Type: GrantFiled: June 9, 2005Date of Patent: September 7, 2010Assignee: ASM America, Inc.Inventors: Christophe F. Pomarede, Michael E. Givens, Eric J. Shero, Michael A. Todd
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Patent number: 7651953Abstract: Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. A silicon nitride layer is then formed by nitriding the silicon layer. By repeating these steps, a silicon nitride layer of a desired thickness is formed.Type: GrantFiled: October 23, 2007Date of Patent: January 26, 2010Assignee: ASM America, Inc.Inventors: Michael A. Todd, Keith D. Weeks, Christiaan J. Werkhoven, Christophe F. Pomarede
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Publication number: 20090311857Abstract: Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. A silicon nitride layer is then formed by nitriding the silicon layer. By repeating these steps, a silicon nitride layer of a desired thickness is formed.Type: ApplicationFiled: August 24, 2009Publication date: December 17, 2009Applicant: ASM America, Inc.Inventors: Michael A. Todd, Keith D. Weeks, Christiaan J. Werkhoven, Christophe F. Pomarede
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Patent number: 7629270Abstract: A nitrogen precursor that has been activated by exposure to a remotely excited species is used as a reactant to form nitrogen-containing layers. The remotely excited species can be, e.g., N2, Ar, and/or He, which has been excited in a microwave radical generator. Downstream of the microwave radical generator and upstream of the substrate, the flow of excited species is mixed with a flow of NH3. The excited species activates the NH3. The substrate is exposed to both the activated NH3 and the excited species. The substrate can also be exposed to a precursor of another species to form a compound layer in a chemical vapor deposition. In addition, already-deposited layers can be nitrided by exposure to the activated NH3 and to the excited species, which results in higher levels of nitrogen incorporation than plasma nitridation using excited N2 alone, or thermal nitridation using NH3 alone, with the same process temperatures and nitridation durations.Type: GrantFiled: August 24, 2005Date of Patent: December 8, 2009Assignee: ASM America, Inc.Inventors: Johan Swerts, Hilde De Witte, Jan Willem Maes, Christophe F. Pomarede, Ruben Haverkort, Yuet Mei Wan, Marinus J. De Blank, Cornelius A. Van Der Jeugd, Jacobus Johannes Beulens
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Patent number: 7476627Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.Type: GrantFiled: May 9, 2006Date of Patent: January 13, 2009Assignee: ASM America, Inc.Inventors: Christophe F. Pomarede, Jeff Roberts, Eric J. Shero
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Patent number: 7297641Abstract: Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. A silicon nitride layer is then formed by nitriding the silicon layer. By repeating these steps, a silicon nitride layer of a desired thickness is formed.Type: GrantFiled: July 18, 2003Date of Patent: November 20, 2007Assignee: ASM America, Inc.Inventors: Michael A. Todd, Keith D. Weeks, Christiaan J. Werkhoven, Christophe F. Pomarede
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Patent number: 7294582Abstract: Sequential processes are conducted in a batch reaction chamber to form ultra high quality silicon-containing compound layers, e.g., silicon nitride layers, at low temperatures. Under reaction rate limited conditions, a silicon layer is deposited on a substrate using trisilane as the silicon precursor. Trisilane flow is interrupted. A silicon nitride layer is then formed by nitriding the silicon layer with nitrogen radicals, such as by pulsing the plasma power (remote or in situ) on after a trisilane step. The nitrogen radical supply is stopped. Optionally non-activated ammonia is also supplied, continuously or intermittently. If desired, the process is repeated for greater thickness, purging the reactor after each trisilane and silicon compounding step to avoid gas phase reactions, with each cycle producing about 5-7 angstroms of silicon nitride.Type: GrantFiled: August 25, 2005Date of Patent: November 13, 2007Assignee: ASM International, N.V.Inventors: Ruben Haverkort, Yuet Mei Wan, Marinus J. De Blank, Cornelius A. van der Jeugd, Jacobus Johannes Beulens, Michael A. Todd, Keith D. Weeks, Christian J. Werkhoven, Christophe F. Pomarede
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Patent number: 7056835Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.Type: GrantFiled: July 24, 2003Date of Patent: June 6, 2006Assignee: ASM America, Inc.Inventors: Christophe F. Pomarede, Jeff Roberts, Eric J. Shero
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Patent number: 7026219Abstract: Methods are provided herein for forming electrode layers over high dielectric constant (“high k”) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is protected from reduction during a subsequent deposition of silicon-containing gate electrode. In particular, a seed deposition phase includes conditions designed for minimizing hydrogen reduction of the gate dielectric, including low hydrogen content, low temperatures and/or low partial pressures of the silicon source gas. Conditions are preferably changed for higher deposition rates and deposition continues in a bulk phase. Desirably, though, hydrogen diffusion is still minimized by controlling the above-noted parameters. In one embodiment, high k dielectric reduction is minimized through omission of a hydrogen carrier gas. In another embodiment, higher order silanes aid in reducing hydrogen content for a given deposition rate.Type: GrantFiled: February 11, 2002Date of Patent: April 11, 2006Assignee: ASM America, Inc.Inventors: Christophe F. Pomarede, Michael E. Givens, Eric J. Shero, Michael A. Todd
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Patent number: 6958277Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.Type: GrantFiled: July 24, 2003Date of Patent: October 25, 2005Assignee: ASM America, Inc.Inventors: Christophe F. Pomarede, Jeff Roberts, Eric J. Shero
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Publication number: 20040147101Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.Type: ApplicationFiled: July 24, 2003Publication date: July 29, 2004Inventors: Christophe F. Pomarede, Jeff Roberts, Eric J. Shero
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Publication number: 20040121620Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.Type: ApplicationFiled: July 24, 2003Publication date: June 24, 2004Inventors: Christophe F. Pomarede, Jeff Roberts, Eric J. Shero
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Patent number: 6613695Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.Type: GrantFiled: August 31, 2001Date of Patent: September 2, 2003Assignee: ASM America, Inc.Inventors: Christophe F. Pomarede, Jeff Roberts, Eric J. Shero
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Publication number: 20020098627Abstract: Methods are provided herein for treating substrate surfaces in preparation for subsequent nucleation-sensitive depositions (e.g., polysilicon or poly-SiGe) and adsorption-driven deposition (e.g. atomic layer deposition or ALD). Prior to depositing, the surface is treated with non-depositing plasma products. The treated surface more readily nucleates polysilicon and poly-SiGe (such as for a gate electrode), or more readily adsorbs ALD reactants (such as for a gate dielectric). The surface treatment provides surface moieties more readily susceptible to a subsequent deposition reaction, or more readily susceptible to further surface treatment prior to deposition. By changing the surface termination of the substrate with a low temperature radical treatment, subsequent deposition is advantageously facilitated without depositing a layer of any appreciable thickness and without significantly affecting the bulk properties of the underlying material.Type: ApplicationFiled: August 31, 2001Publication date: July 25, 2002Inventors: Christophe F. Pomarede, Jeff Roberts, Eric J. Shero