Patents by Inventor CHRISTOPHE LAYER

CHRISTOPHE LAYER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940939
    Abstract: Data may be communicated from a sender device to a receiver device over enabled or selected byte positions or other data bit groups of a data bus. The sender device may determine data values to be sent over the data bus and may determine which byte positions are enabled or selected and which are not selected. The sender device may also determine a code. The code may be a value that is not included in the data values to be sent over the data bus. The sender device may then send the selected data values in selected byte positions of the data bus and send the code in non-selected byte positions of the data bus. The sender device may also send the code to the receiver device separately from the data bit lanes of the data bus.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Philippe Boucard, Christophe Layer, Luc Montperrus
  • Publication number: 20230281143
    Abstract: Data may be communicated from a sender device to a receiver device over enabled or selected byte positions or other data bit groups of a data bus. The sender device may determine data values to be sent over the data bus and may determine which byte positions are enabled or selected and which are not selected. The sender device may also determine a code. The code may be a value that is not included in the data values to be sent over the data bus. The sender device may then send the selected data values in selected byte positions of the data bus and send the code in non-selected byte positions of the data bus. The sender device may also send the code to the receiver device separately from the data bit lanes of the data bus.
    Type: Application
    Filed: March 7, 2022
    Publication date: September 7, 2023
    Inventors: Philippe BOUCARD, Christophe LAYER, Luc MONTPERRUS
  • Patent number: 11156652
    Abstract: A reflectometry system for the analysis of faults in a transmission line into which a complex signal, generated then modulated, has been injected, includes a means for measuring the modulated complex signal propagating in the transmission line, a demodulator of the measured signal designed to produce a demodulated complex signal, a complex correlator configured for correlating the demodulated complex signal with a copy of the generated complex signal, in order to produce a first time-domain reflectogram corresponding to the real part of the complex correlation and a second time-domain reflectogram corresponding to the imaginary part of the complex correlation, a module for joint analysis of the first time-domain reflectogram and of the second time-domain reflectogram for identifying the presence of faults in the transmission line.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: October 26, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Esteban Cabanillas, Christophe Layer
  • Patent number: 11054458
    Abstract: A method and device for detecting faults in a transmission line by reflectometry, include the following steps: injecting into the transmission line a reference signal at an emission frequency fDAC; collecting a reflected signal at a point on the transmission line; sampling the reflected signal at a sampling frequency fADC, the sampling frequency fADC being different from the emission frequency fDAC; storing each point of the sampled signal at a memory address corresponding to an index assigned to the point of the sampled signal and according to a precomputed memory-address increment ?, the memory-address increment ? depending on the emission frequency fDAC, on the sampling frequency fADC, on an over-sampling factor ? and on a preset acquisition time ?; repeating the storing step during the acquisition time ?; and generating, from the points stored during the acquisition time, a recomposed signal able to be used to detect faults.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: July 6, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Christophe Layer, Esteban Cabanillas, Antoine Dupret
  • Publication number: 20210148962
    Abstract: A reflectometry system includes an amplifier of the signal to be injected into the cable to be analyzed and that incorporates a mechanism for correcting for the non-linear effect of the amplifier without significantly increasing the bulk of the system by limiting the number of additional components to be incorporated with respect to a system without correction of the non-linear effect.
    Type: Application
    Filed: June 20, 2018
    Publication date: May 20, 2021
    Inventors: Esteban CABANILLAS, Christophe LAYER
  • Patent number: 10969418
    Abstract: A reflectometry system includes at least one measurement means for measuring a reference signal retro-propagated in at least one transmission line, at least one analog-digital converter for converting at least one measured signal into a set of at least one first digital signal and one second digital signal, at least one complex correlator configured to correlate the real reference signal with a complex signal whose real part is formed by a first digital signal of the set and whose imaginary part is formed by a second digital signal of the set, so as to produce a first reflectogram corresponding to the real part of the complex signal and a second reflectogram corresponding to the imaginary part of the complex signal, an analysis module for analyzing at least the first reflectogram and the second reflectogram so as to identify the presence of defects in at least one transmission line.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: April 6, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Christophe Layer, Esteban Cabanillas, Mickael Cartron
  • Publication number: 20200200814
    Abstract: A method and device for detecting faults in a transmission line by reflectometry, include the following steps: injecting into the transmission line a reference signal at an emission frequency fDAC; collecting a reflected signal at a point on the transmission line; sampling the reflected signal at a sampling frequency fADC, the sampling frequency fADC being different from the emission frequency fDAC; storing each point of the sampled signal at a memory address corresponding to an index assigned to the point of the sampled signal and according to a precomputed memory-address increment ?, the memory-address increment ? depending on the emission frequency fDAC, on the sampling frequency fADC, on an over-sampling factor ? and on a preset acquisition time ?; repeating the storing step during the acquisition time ?; and generating, from the points stored during the acquisition time, a recomposed signal able to be used to detect faults.
    Type: Application
    Filed: June 1, 2018
    Publication date: June 25, 2020
    Inventors: Christophe LAYER, Esteban CABANILLAS, Antoine DUPRET
  • Publication number: 20200166560
    Abstract: A reflectometry system includes at least one measurement means for measuring a reference signal retro-propagated in at least one transmission line, at least one analog-digital converter for converting at least one measured signal into a set of at least one first digital signal and one second digital signal, at least one complex correlator configured to correlate the real reference signal with a complex signal whose real part is formed by a first digital signal of the set and whose imaginary part is formed by a second digital signal of the set, so as to produce a first reflectogram corresponding to the real part of the complex signal and a second reflectogram corresponding to the imaginary part of the complex signal, an analysis module for analyzing at least the first reflectogram and the second reflectogram so as to identify the presence of defects in at least one transmission line.
    Type: Application
    Filed: July 18, 2018
    Publication date: May 28, 2020
    Inventors: Christophe LAYER, Esteban CABANILLAS, Mickael CARTRON
  • Publication number: 20200124656
    Abstract: A method for detecting an intermittent fault in a transmission line, includes the following steps: acquiring, at a point of the line, using a measurement device, a temporal measurement of a reference signal previously injected into the line using an injection device, reflected off a singularity of the line and propagated back to the point, filtering the temporal measurement of the signal using at least one filter that is predetermined depending on the spectral signature of a given type of fault, calculating the intercorrelation between at least one filtered signal and the reference signal so as to produce at least one time reflectogram, analyzing the at least one time reflectogram so as to characterize the possible presence of at least one intermittent fault on the transmission line.
    Type: Application
    Filed: April 18, 2018
    Publication date: April 23, 2020
    Inventors: Christophe LAYER, Esteban CABANILLAS
  • Publication number: 20200116777
    Abstract: A reflectometry system for the analysis of faults in a transmission line into which a complex signal, generated then modulated, has been injected, includes a means for measuring the modulated complex signal propagating in the transmission line, a demodulator of the measured signal designed to produce a demodulated complex signal, a complex correlator configured for correlating the demodulated complex signal with a copy of the generated complex signal, in order to produce a first time-domain reflectogram corresponding to the real part of the complex correlation and a second time-domain reflectogram corresponding to the imaginary part of the complex correlation, a module for joint analysis of the first time-domain reflectogram and of the second time-domain reflectogram for identifying the presence of faults in the transmission line.
    Type: Application
    Filed: November 29, 2017
    Publication date: April 16, 2020
    Inventors: Esteban CABANILLAS, Christophe LAYER
  • Publication number: 20200049755
    Abstract: A method for detecting a fault in a transmission line, includes the following steps: acquiring, at a point of the line, using a measurement device, a temporal measurement of a reference signal previously injected into the line using an injection device, reflected off a singularity of the line and propagated back to the point, converting the temporal measurement of the signal into the frequency domain, measuring the phase of at least one frequency component of the signal, subtracting a reference phase from each measured phase in order to obtain a corrected phase, determining the distance ld between the point of the line and the singularity from at least one corrected phase.
    Type: Application
    Filed: April 12, 2018
    Publication date: February 13, 2020
    Inventors: Esteban CABANILLAS, Christophe LAYER
  • Publication number: 20170131910
    Abstract: A register including: a plurality of volatile memory cells each having a first input and an output, the volatile memory cells being coupled in series with each other via their first inputs and outputs; a non-volatile memory comprising a plurality of non-volatile memory cells; and one or more serial connections adapted to perform at least one of: serially supply data to be written to the non-volatile memory from a last or another of the volatile memory cells to the non-volatile memory during a back-up operation of data stored by the volatile memory cells; and serially supply data read from the non-volatile memory to a first of the volatile memory cells during a restoration operation of the data stored by the volatile memory cells.
    Type: Application
    Filed: June 8, 2015
    Publication date: May 11, 2017
    Applicants: Commissariat à I'Énergie Atomique et aux Énergies Alternatives, Centre National de la Recherche Scientifique
    Inventors: Pierre Paoli, Christophe Layer, Virgile Javerliac, Jean-Pierre Nozieres
  • Patent number: 9640257
    Abstract: A memory array including: a first volatile memory cell including first and second cross-coupled inverters between first and second storage nodes; a first non-volatile memory cell including at least one resistive element that can be programmed to take one of at least two resistive states; and a control circuit adapted to couple the first non-volatile memory cell to the first and second storage nodes in order to generate a current for programming the resistive state of the at least one resistive element.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: May 2, 2017
    Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Centre National de la Recherche Scientifique
    Inventors: Virgile Javerliac, Christophe Layer
  • Patent number: 9620212
    Abstract: A memory array including: a plurality of volatile memory cells, each including a latch; and a plurality of non-volatile memory cells, each including at least one resistive element that can be programmed by the direction of a current passed therethrough in order to take at least two resistive states, each of the non-volatile memory cells being associated with a corresponding cell from the volatile memory cells.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: April 11, 2017
    Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Centre National de la Recherche Scientifique
    Inventors: Virgile Javerliac, Christophe Layer
  • Publication number: 20160329100
    Abstract: A memory array including: a plurality of volatile memory cells, each including a latch; and a plurality of non-volatile memory cells, each including at least one resistive element that can be programmed by the direction of a current passed therethrough in order to take at least two resistive states, each of the non-volatile memory cells being associated with a corresponding cell from the volatile memory cells.
    Type: Application
    Filed: January 7, 2015
    Publication date: November 10, 2016
    Applicants: Commissariat à L'Énergie Atomique et aux Énergies Alternatives, Centre National de la Recherche Scientifique
    Inventors: Virgile Javerliac, Christophe Layer
  • Publication number: 20160329098
    Abstract: A memory array including: a first volatile memory cell including first and second cross-coupled inverters between first and second storage nodes; a first non-volatile memory cell including at least one resistive element that can be programmed to take one of at least two resistive states; and a control circuit adapted to couple the first non-volatile memory cell to the first and second storage nodes in order to generate a current for programming the resistive state of the at least one resistive element.
    Type: Application
    Filed: January 7, 2015
    Publication date: November 10, 2016
    Applicants: Commissariat à I'Énergie Atomique et aux Énergies Alternatives, Centre National de la Recherche Scientifique
    Inventors: Virgile Javerliac, Christophe Layer
  • Patent number: 9430190
    Abstract: A method for operating a fused-multiply-add pipeline in a floating-point unit of a processor is disclosed. A multiplication is initially performed between a first operand and a second operand in a multiplier block to obtain a set of partial product results. The partial product results are sent to a carry-save adder block. A partial product reduction is performed on the partial product results to generate a carry-save result having a sum term and a carry term. The carry-save result is then formatted to generate a carry-out bit. The carry-save result is added to a third operand to generate a final result.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Son Dao Trong, Michael Klein, Christophe Layer, Silvia M. Mueller
  • Publication number: 20140244704
    Abstract: A method for operating a fused-multiply-add pipeline in a floating-point unit of a processor is disclosed. A multiplication is initially performed between a first operand and a second operand in a multiplier block to obtain a set of partial product results. The partial product results are sent to a carry-save adder block. A partial product reduction is performed on the partial product results to generate a carry-save result having a sum term and a carry term. The carry-save result is then formatted to generate a carry-out bit. The carry-save result is added to a third operand to generate a final result.
    Type: Application
    Filed: January 31, 2014
    Publication date: August 28, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: SON DAO TRONG, MICHAEL KLEIN, CHRISTOPHE LAYER, SILVIA M. MUELLER