Patents by Inventor Christophe Malville

Christophe Malville has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabrication of a semiconductor structure including an interposer free from any through via
    Patent number: 11114314
    Abstract: A method of forming a semiconductor structure includes introducing, at selected conditions, hydrogen and helium species (e.g., ions) in a temporary support to form a plane of weakness at a predetermined depth therein, and to define a superficial layer and a residual part of the temporary support; forming on the temporary support an interconnection layer; placing at least one semiconductor chip on the interconnection layer; assembling a stiffener on a back side of the at least one semiconductor chip; and providing thermal energy to the temporary support to detach the residual part and provide the semiconductor structure. The interconnection layer forms an interposer free from any through via.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: September 7, 2021
    Assignee: Soitec
    Inventors: Bich-Yen Nguyen, Ludovic Ecarnot, Nadia Ben Mohamed, Christophe Malville
  • METHOD FOR FABRICATION OF A SEMICONDUCTOR STRUCTURE INCLUDING AN INTERPOSER FREE FROM ANY THROUGH VIA
    Publication number: 20200328094
    Abstract: A method of forming a semiconductor structure includes introducing, at selected conditions, hydrogen and helium species (e.g., ions) in a temporary support to form a plane of weakness at a predetermined depth therein, and to define a superficial layer and a residual part of the temporary support; forming on the temporary support an interconnection layer; placing at least one semiconductor chip on the interconnection layer assembling a stiffener on a back side of the at least one semiconductor chip; and providing thermal energy to the temporary support to detach the residual part and provide the semiconductor structure. The interconnection layer forms an interposer free from any through via.
    Type: Application
    Filed: May 24, 2017
    Publication date: October 15, 2020
    Inventors: Bich-Yen Nguyen, Ludovic Ecarnot, Nadia Ben Mohamed, Christophe Malville
  • Method for automatically determining the surface quality of a bonding interface between two wafers
    Patent number: 6881596
    Abstract: The invention relates to a device and method for automatically determining the surface quality of a bonding interface between two wafers. The device includes a detector for automatically detecting a bonding wave at a predetermined measuring site to determine when bonding occurs at the measuring site, and a processing unit for automatically calculating the bonding speed based on a location of the measuring site and at least one other predetermined site.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: April 19, 2005
    Assignee: S.O.I. Tec Silicon on Insulator Technologies S.A.
    Inventors: Christophe Malville, Frédéric Metral
  • Device and method for automatically determining the surface quality of a bonding interface between two wafers
    Publication number: 20040005727
    Abstract: The invention relates to a device and method for automatically determining the surface quality of a bonding interface between two wafers. The device includes a detector for automatically detecting a bonding wave at a predetermined measuring site to determine when bonding occurs at the measuring site, and a processing unit for automatically calculating the bonding speed based on a location of the measuring site and at least one other predetermined site.
    Type: Application
    Filed: April 29, 2003
    Publication date: January 8, 2004
    Inventors: Christophe Malville, Frederic Metral