Abstract: A substrate, in particular, a multilayer substrate, includes a mounting and electrical-connection support, and a face for mounting at least one integrated circuit chip (IC chip). The substrate and the mounted IC chip are placed in an injection mold. The injection mold has two parts that surround the periphery of the substrate. One part of the injection mold defines a cavity for molding an encapsulation material thereby encapsulating the IC chip, and includes a face for bearing on the mounting face. At least one recess is provided in one part of the injection mold. The recess defines, above the mounting face, a slot for providing a vent for venting gases. The mounting face includes a region on which a metal outer layer is placed. The metal outer layer extends along the recess and on the bearing face on both sides of the recess.

Abstract: A semiconductor package includes a mounting and electrical connection plate, and a semiconductor component having front and rear surfaces and including a sensor. The rear surface of the semiconductor component is attached to the mounting and electrical connection plate and the front surface is attached to the sensor. An insert is adjacent the front face of the semiconductor component and the sensor and has an access passage for exposing the sensor. A plug is in the access passage of the insert. A body of encapsulation material surrounds the mounting and electrical connection plate, the semiconductor component and the insert.

Abstract: Method of fabricating a semiconductor package and semiconductor package containing an integrated circuit chip having, on one front face, electrical connection regions, in which a first multilayer plate (2) comprising an assembly face (2a) is furnished with an adhesive layer (8) and which has through-holes (9); and a second plate (3) has a recess (13) made in one assembly face (3a) fastened to the assembly face of the first plate via the said adhesive layer; the said chip (4) being placed in the said recess in a position such that its front face is fastened to the assembly face of the first plate via the said adhesive layer and that its electrical connection regions are located facing the through-holes of this first plate, and the bottom of the recess of the said second plate bearing against the rear face of the chip opposite the front face.

Abstract: Method of fabricating an optical semiconductor package and optical semiconductor package containing an integrated circuit chip having on a front face an optical sensor and electrical connection regions distributed around this sensor, in which a transparent patch (6) lies in front of the front face of the chip without covering the electrical connection regions of this chip, plates (2, 7) defining between them a cavity (10) in which the said chip and the said patch are stacked and which have annular assembly faces (2a, 7a), electrical connection pads (15) are placed between the said electrical connection regions and one face (12) of the said cavity, electrical connection tracks (14) are carried by a plate (7) and lie on the said face (12) of the cavity in order to be in contact with the said pads, an adhesive layer (18) flying between the said assembly faces (2a, 7a), the said tracks (14) protruding in order to pass between the assembly faces of the said plates with a view to external connections and the plate

Abstract: An optical semiconductor product includes an integrated circuit chip having an optical sensor in its front face. The chip is attached to a support plate and electrical interconnection is made therebetween. A protective ring is fastened to the front face of the chip, around and at some distance from the optical sensor. A ring of encapsulating material is deposited to surround the periphery of the chip and lie between the front face of the support plate (2) and the protective ring.

Abstract: The leadframe has a perforation to form, between a central platform and a peripheral part located a certain distance apart, radiating elongate leads. The leadframe has, on its rear face that comes into contact with a bearing surface of a mold, at least one recess and a groove for connecting this recess to the perforation.

Abstract: An injection mold is provided for encapsulating an integrated circuit chip to form a semiconductor package. The injection mold includes at least one injection cavity for housing the chip, and an insert having a front part that forms part of the wall of the injection cavity. A transverse surface of the insert has a roughness that is chosen such that the face of the semiconductor package has a suitable roughness in a corresponding region. Also provided is a semiconductor package that includes an encapsulation block and an integrated circuit chip. The material of the encapsulation block is transparent. One face of the chip includes an optical sensor and lies parallel to a transverse face of the encapsulation block. The transverse face of the encapsulation block includes a region that has a roughness that is less than the roughness of at least the rest of the transverse face.

Abstract: Method of fabricating an optical semiconductor package and optical semiconductor package containing an integrated circuit chip having on a front face an optical sensor and electrical connection regions distributed around this sensor, in which a transparent patch (6) lies in front of the front face of the chip without covering the electrical connection regions of this chip, plates (2, 7) defining between them a cavity (10) in which the said chip and the said patch are stacked and which have annular assembly faces (2a, 7a), electrical connection pads (15) are placed between the said electrical connection regions and one face (12) of the said cavity, electrical connection tracks (14) are carried by a plate (7) and lie on the said face (12) of the cavity in order to be in contact with the said pads, an adhesive layer (18) flying between the said assembly faces (2a, 7a), the said tracks (14) protruding in order to pass between the assembly faces of the said plates with a view to external connections and the plate

Abstract: A semiconductor package is provided that includes an electrical connection and support means having a front face and a recess in the front face. The semiconductor package also includes a semiconductor component having a front face including a sensor and a rear face which presses on the bottom of the recess of the electrical connection and support means. Further included in the semiconductor package is a positioning and locking means for locking the semiconductor component onto the electrical connection and support means. The positioning and locking means is engaged in a space which separates the periphery of the semiconductor component from the periphery of the recess and keeps the semiconductor component pressed against the bottom of the recess. Thus, there is provided a semiconductor package having efficiently oriented components.

Abstract: Method of fabricating a semiconductor package and semiconductor package containing an integrated circuit chip having, on one front face, electrical connection regions, in which a first multilayer plate (2) comprising an assembly face (2a) is furnished with an adhesive layer (8) and which has through-holes (9); and a second plate (3) has a recess (13) made in one assembly face (3a) fastened to the assembly face of the first plate via the said adhesive layer; the said chip (4) being placed in the said recess in a position such that its front face is fastened to the assembly face of the first plate via the said adhesive layer and that its electrical connection regions are located facing the through-holes of this first plate, and the bottom of the recess of the said second plate bearing against the rear face of the chip opposite the front face.

Abstract: Substrate, in particular a multilayer substrate constituting a mounting and electrical-connection support, having a face (2) for mounting at least one integrated-circuit chip (3) and capable of being placed, provided with this chip, in an injection mould (8) having two parts which take between them the periphery of the substrate and one of which defines a cavity (15) for moulding an encapsulation material for the purpose of encapsulating the said chip and has a face for bearing on the said mounting face, in which at least one recess (16) is provided, the said recess defining, above the said mounting face, a slot (17) constituting a vent for venting gases. Its aforementioned mounting face (2) has a region on which a metal outer layer (6) is placed, this layer being placed so as to extend along the said recess (16) and on the said bearing face (12) on either side of this recess.

Abstract: A semiconductor package includes a mounting and electrical connection plate, and a semiconductor component having front and rear surfaces and including a sensor. The rear surface of the semiconductor component is attached to the mounting and electrical connection plate and the front surface is attached to the sensor. An insert is adjacent the front face of the semiconductor component and the sensor and has an access passage for exposing the sensor. A plug is in the access passage of the insert. A body of encapsulation material surrounds the mounting and electrical connection plate, the semiconductor component and the insert.

Abstract: An optical semiconductor product includes an integrated circuit chip having an optical sensor in its front face. The chip is attached to a support plate and electrical interconnection is made therebetween. A protective ring is fastened to the front face of the chip, around and at some distance from the optical sensor. A ring of encapsulating material is deposited to surround the periphery of the chip and lie between the front face of the support plate (2) and the protective ring.

Abstract: The leadframe has a perforation to form, between a central platform and a peripheral part located a certain distance apart, radiating elongate leads. The leadframe has, on its rear face that comes into contact with a bearing surface of a mold, at least one recess and a groove for connecting this recess to the perforation.

Abstract: A semiconductor package is provided that includes an electrical connection and support means having a front face and a recess in the front face. The semiconductor package also includes a semiconductor component having a front face including a sensor and a rear face which presses on the bottom of the recess of the electrical connection and support means. Further included in the semiconductor package is a positioning and locking means for locking the semiconductor component onto the electrical connection and support means. The positioning and locking means is engaged in a space which separates the periphery of the semiconductor component from the periphery of the recess and keeps the semiconductor component pressed against the bottom of the recess. Thus, there is provided a semiconductor package having efficiently oriented components.

Abstract: An injection-molding mold having two parts adapted to take up between them the periphery of a substrate and one of which defines a molding cavity connected to means for feeding a coating material for encapsulating a row of spaced integrated circuit chips carried by a mounting face of said substrate and placed in said cavity, characterized in that the part (10) with cavities (14) includes a slot (17) for injecting the coating material into said cavity above the mounting face (2) of the substrate, recessed into its face (12) bearing on the substrate (1) along said row of chips and extending approximately the whole length of that row of chips.

Abstract: An injection mold is provided for encapsulating an integrated circuit chip to form a semiconductor package. The injection mold includes at least one injection cavity for housing the chip, and an insert having a front part that forms part of the wall of the injection cavity. A transverse surface of the insert has a roughness that is chosen such that the face of the semiconductor package has a suitable roughness in a corresponding region. Also provided is a semiconductor package that includes an encapsulation block and an integrated circuit chip. The material of the encapsulation block is transparent. One face of the chip includes an optical sensor and lies parallel to a transverse face of the encapsulation block. The transverse face of the encapsulation block includes a region that has a roughness that is less than the roughness of at least the rest of the transverse face.