Patents by Inventor Christopher A. Bennett
Christopher A. Bennett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9118527Abstract: This application discusses among other things, apparatus and method for transmitting data with an analog signal without significantly distorting the analog signal. In an example, an apparatus can include an audio channel, a capacitor coupled to a first conductor of the audio channel, the capacitor configured to couple an analog representation of a digital data signal with an analog audio signal on the audio channel, and a frequency modulator configured to receive the digital data signal and to modulate a frequency of an output signal of the frequency modulator based on a logic level of the digital data signal, wherein the analog representation of the digital data signal includes the frequency of the output signal of the frequency modulator.Type: GrantFiled: October 9, 2013Date of Patent: August 25, 2015Assignee: Fairchild Semiconductor CorporationInventors: Christopher A. Bennett, Gregory A. Maher, Brewster Porcella
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Patent number: 8830639Abstract: This document discusses among other things apparatus and methods for reducing ESD damage to buffer circuits. In an example, an output buffer can include an output, a first transistor configured to couple the output to a high logic supply rail, a second transistor configured to couple the output node to a low logic supply rail, pre-driver logic configured to drive a gate of the first transistor and a gate of the second transistor, and a first resistor configured to reduce electrostatic discharge (ESD) induced current between the first transistor and the pre-driver logic.Type: GrantFiled: January 12, 2012Date of Patent: September 9, 2014Assignee: Fairchild Semiconductor CorporationInventors: Christopher A. Bennett, Taeghyun Kang
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Publication number: 20140105312Abstract: This application discusses among other things, apparatus and method for transmitting data with an analog signal without significantly distorting the analog signal. In an example, an apparatus can include an audio channel, a capacitor coupled to a first conductor of the audio channel, the capacitor configured to couple an analog representation of a digital data signal with an analog audio signal on the audio channel, and a frequency modulator configured to receive the digital data signal and to modulate a frequency of an output signal of the frequency modulator based on a logic level of the digital data signal, wherein the analog representation of the digital data signal includes the frequency of the output signal of the frequency modulator.Type: ApplicationFiled: October 9, 2013Publication date: April 17, 2014Applicant: FAIRCHILD SEMICONDUCTOR CORPORATIONInventors: Christopher A. Bennett, Gregory A. Maher, Brewster Porcella
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Patent number: 8599525Abstract: An apparatus comprises an integrated circuit (IC) including an external IC connection, a high impedance circuit, a biasing circuit communicatively coupled to the external IC connection via the high impedance circuit, and an electro-static discharge (ESD) protection circuit coupled to the biasing circuit to form a circuit shunt path leading from the IC external connection to the ESD protection circuit via the high impedance circuit.Type: GrantFiled: May 9, 2011Date of Patent: December 3, 2013Assignee: Fairchild Semiconductor CorporationInventors: Christopher A. Bennett, Kenneth P. Snowdon
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Patent number: 8405424Abstract: A system according to one embodiment includes input stage circuitry configured to receive input data; output stage circuitry configured to generate buffered output data based on said received input data, said output stage circuitry comprising a first switch and a second switch, wherein said first switch comprises a first gate configured to control said first switch through an inverted gate signal and said second switch comprises a second gate configured to control said second switch through a non-inverted gate signal; first feedback inverter circuitry configured to enable pull-up of said second gate based on an input to said first gate, said first feedback inverter circuitry is further configured to provide an adjustable transition threshold for generation of said pull-up enable; and second feedback inverter circuitry configured to enable pull-down of said first gate based on an input to said second gate, said second feedback inverter circuitry is further configured to provide an adjustable transition threshoType: GrantFiled: June 8, 2011Date of Patent: March 26, 2013Assignee: Fairchild Semiconductor CorporationInventor: Christopher A. Bennett
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Publication number: 20120313663Abstract: A system according to one embodiment includes input stage circuitry configured to receive input data; output stage circuitry configured to generate buffered output data based on said received input data, said output stage circuitry comprising a first switch and a second switch, wherein said first switch comprises a first gate configured to control said first switch through an inverted gate signal and said second switch comprises a second gate configured to control said second switch through a non-inverted gate signal; first feedback inverter circuitry configured to enable pull-up of said second gate based on an input to said first gate, said first feedback inverter circuitry is further configured to provide an adjustable transition threshold for generation of said pull-up enable; and second feedback inverter circuitry configured to enable pull-down of said first gate based on an input to said second gate, said second feedback inverter circuitry is further configured to provide an adjustable transition threshoType: ApplicationFiled: June 8, 2011Publication date: December 13, 2012Inventor: Christopher A. Bennett
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Publication number: 20120287538Abstract: An apparatus comprises an integrated circuit (IC) including an external IC connection, a high impedance circuit, a biasing circuit communicatively coupled to the external IC connection via the high impedance circuit, and an electro-static discharge (ESD) protection circuit coupled to the biasing circuit to form a circuit shunt path leading from the IC external connection to the ESD protection circuit via the high impedance circuit.Type: ApplicationFiled: May 9, 2011Publication date: November 15, 2012Inventors: Christopher A. Bennett, Kenneth P. Snowdon
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Publication number: 20120182663Abstract: This document discusses among other things apparatus and methods for reducing ESD damage to buffer circuits. In an example, an output buffer can include an output, a first transistor configured to couple the output to a high logic supply rail, a second transistor configured to couple the output node to a low logic supply rail, pre-driver logic configured to drive a gate of the first transistor and a gate of the second transistor, and a first resistor configured to reduce electrostatic discharge (ESD) induced current between the first transistor and the pre-driver logic.Type: ApplicationFiled: January 12, 2012Publication date: July 19, 2012Inventors: Christopher A. Bennett, Taeghyun Kang
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Patent number: 8124145Abstract: A chewing gum comprising a solid shaped chewing gum composition sanded with a sugar alcohol having a negative heat of solution and a method of mixing same. The method involves coating solid pieces of chewing gum composition with a wetting syrup and sanding the wetted pieces with sugar alcohol crystals. The chewing gum is characterized by intense initial cooling and flavor release.Type: GrantFiled: May 10, 2006Date of Patent: February 28, 2012Assignee: The Hershey CompanyInventors: Thomas J. Carroll, Robert J. Huzinec, Christopher A. Bennett, Justin E. May, Tesfalidet Halie