Abstract: An agent trained using reinforcement learning (RL) can be used to determine a structure for a complex tensor network. The agent makes incremental changes to a tensor network according to a policy model, where parameters of the policy model were trained using RL. The agent may use a cost function to assess the changes, e.g., to determine whether or not to keep a particular modification. In some cases, tensor networks determined using the RL agent can be used to train a model that can more efficiently select a structure for a complex tensor network.

Abstract: The invention relates to a hair styling device, and in particular a multifunctional hair styling device having components which can carry out a number of different (and distinct) styling operations. The invention provides a hair styling device having a body portion and a handle portion, the body portion having an air inlet and an air outlet, an impeller between the air inlet and the air outlet and an electric motor to rotate the impeller, the handle portion having a pair of heating panels. The handle portion is separable from the body portion and can be used alone as a hair straighter, or the device can be used as a hair dryer with the handle portion attached to the body portion. The body portion can optionally include a hair curling chamber adapted for hair curling.

Abstract: Systems, methods, and apparatuses relating sparsity based FMA. In some examples, an instance of a single FMA instruction has one or more fields for an opcode, one or more fields to identify a source/destination matrix operand, one or more fields to identify a first plurality of source matrix operands, one or more fields to identify a second plurality of matrix operands, wherein the opcode is to indicate that execution circuitry is to select a proper subset of data elements from the first plurality of source matrix operands based on sparsity controls from a first matrix operand of the second plurality of matrix operands and perform a FMA.

Abstract: Techniques for shared data prefetch are described. An exemplary instruction for shared data prefetch includes at least one field for an opcode, at least one field for a source operand to provide a memory address at least a byte of data, wherein the opcode is to indicate that circuitry is to fetch of a line of data from memory at the provided address that contains the byte specified with the source operand and store that byte in at least a cache local to a requester, wherein the byte of data is to be stored in a shared state.

Abstract: A computer implemented method for determining accuracy of heart rate variability is proposed. The method comprises the following steps: a) providing at least one photoplethysmogram obtained by at least one portable photoplethysmogram device (110); b) Determining at least one signal feature by evaluating the photoplethysmogram; c) Determining the accuracy of heart rate variability by using at least one trained model, wherein the signal features determined in step b) are used as input for the trained model.

Abstract: Techniques for comparing BF16 data elements are described. An exemplary BF16 comparison instruction includes fields for an opcode, an identification of a location of a first packed data source operand, and an identification of a location of a second packed data source operand, wherein the opcode is to indicate that execution circuitry is to perform, for a particular data element position of the packed data source operands, a comparison of a data element at that position, and update a flags register based on the comparison.

Abstract: Techniques for scale and reduction of BF16 data elements are described. An exemplary instruction includes fields for an having fields for an opcode, an identification of a location of a first packed data source operand, an identification of a location of a second packed data source operand, and an identification of a packed data destination operand, wherein the opcode is to indicate that execution circuitry is to perform, for each data element position of the packed data source operands, a floating point scale operation of a BF16 data element of the first packed data source by multiplying the data element by a power of 2 value, wherein a value of the exponent of the power of 2 value is a floor value of a BF16 data element of the second packed data source, and store a result of the floating point scale operation into a corresponding data element position of the packed data destination operand.

Abstract: Techniques for performing arithmetic operations on BF16 values are described. An exemplary instruction includes fields for an opcode, an identification of a location of a first packed data source operand, an identification of a location of a second packed data source operand, and an identification of location of a packed data destination operand, wherein the opcode is to indicate an arithmetic operation execution circuitry is to perform, for each data element position of the identified packed data source operands, the arithmetic operation on BF16 data elements in that data element position in BF16 format and store a result of each arithmetic operation into a corresponding data element position of the identified packed data destination operand.

Abstract: Techniques for performing square root or reciprocal square root calculations on BF16 data elements in response to an instruction are described. An example of an instruction is one that includes fields for an opcode, an identification of a location of a packed data source operand, and an identification of a packed data destination operand, wherein the opcode is to indicate that execution circuitry is to perform, for each data element position of the packed data source operand, a calculation of a square root value of a BF16 data element in that position and store a result of each square root into a corresponding data element position of the packed data destination operand.

Abstract: Techniques for performing BF16 FMA in response to an instruction are described.

Abstract: Techniques for BF16 classification or manipulation using single instructions are described. An exemplary instruction includes fields for an opcode, an identification of a location of a packed data source operand, an indication of one or more classification checks to perform, and an identification of a packed data destination operand, wherein the opcode is to indicate that execution circuitry is to perform, for each data element position of the packed data source operand, a classification according to the indicated one or more classification checks and store a result of the classification in a corresponding data element position of the destination operand.

Abstract: Techniques for matrix multiplication are described. In some examples, decode circuitry is to decode a single instruction having fields for an opcode, an indication of a location of a first source operand, an indication of a location of a second source operand, and an indication of a location of a destination operand, wherein the opcode is to indicate that execution circuitry is to at least convert data elements of the first and second source operands from a first floating point representation to a second floating point representation, perform matrix multiplication with the converted data elements, and accumulate results of the matrix multiplication in the destination operand in the first floating point representation; and the execution circuitry is to execute to the decoded instruction as specified by the opcode.

Abstract: Techniques are described for selectively adapting and/or selectively utilizing a noise reduction technique in detection of one or more features of a stream of audio data frames. For example, various techniques are directed to selectively adapting and/or utilizing a noise reduction technique in detection of an invocation phrase in a stream of audio data frames, detection of voice characteristics in a stream of audio data frames (e.g., for speaker identification), etc. Utilization of described techniques can result in more robust and/or more accurate detections of features of a stream of audio data frames in various situations, such as in environments with strong background noise. In various implementations, described techniques are implemented in combination with an automated assistant, and feature(s) detected utilizing techniques described herein are utilized to adapt the functionality of the automated assistant.

Abstract: Methods and systems for assessing autism spectrum disorder (ASD) are described herein. Data identifying one or more behaviors associated with ASD may be received. A scenario specifying a plurality of different tasks may be received. An extended reality (XR) device may present and XR environment to a subject. The XR device may present, in the XR environment, a first task of the plurality of different tasks. Based on a subject interaction with one or more objects in the XR environment, interaction data may be calculated. Based on the interaction data, at least one second task may be selected from the plurality of different tasks. The at least one second task may be configured to train a different skill as compared to the first task. The XR environment may be modified to present the second task.

Abstract: The invention relates to a hair styling device, and in particular to a hair straightener. The hair styling device (10; 210) has a first arm (12; 212) and a second arm (14; 214), the first and second arms being moveable relative to one another between a closed or operative condition and an open or inoperative condition. The first member (12; 212) has a first heating panel (16; 116; 216) and the second member (14; 214) has a second heating panel (18; 118; 218). The heating panels (16, 18; 116, 118; 216, 218) are corrugated to increase the length of the path the hair must take between the heating panels. The first and second heating panels are spaced apart in the operative condition so as not to press or clamp the hair therebetween.

Abstract: Techniques are described for selectively adapting and/or selectively utilizing a noise reduction technique in detection of one or more features of a stream of audio data frames. For example, various techniques are directed to selectively adapting and/or utilizing a noise reduction technique in detection of an invocation phrase in a stream of audio data frames, detection of voice characteristics in a stream of audio data frames (e.g., for speaker identification), etc. Utilization of described techniques can result in more robust and/or more accurate detections of features of a stream of audio data frames in various situations, such as in environments with strong background noise. In various implementations, described techniques are implemented in combination with an automated assistant, and feature(s) detected utilizing techniques described herein are utilized to adapt the functionality of the automated assistant.

Abstract: A cap assembly for a container and a method of assembly. The cap assembly includes a housing couplable to a container opening, the housing defining a housing opening communicating with the container opening; a cover operable to close the housing opening; and a retainer mechanism operable to releasably connect the cover to the housing, the retainer mechanism including a non-fusible member selectively contacting the cover and the housing, and a fusible member operable to hold the non-fusible member in contact with the cover and the housing in a retaining condition, the fusible member deforming at or above a threshold of the condition to allow the non-fusible member to move out of contact with one of the cover and the housing, in a release condition, to open the container opening to atmosphere.

Abstract: Techniques for converting FP16 data elements to BF8 data elements using a single instruction are described. An exemplary apparatus includes decoder circuitry to decode a single instruction, the single instruction to include a one or more fields to identify a source operand, one or more fields to identify a destination operand, and one or more fields for an opcode, the opcode to indicate that execution circuitry is to convert packed half-precision floating-point data from the identified source to packed bfloat8 data and store the packed bfloat8 data into corresponding data element positions of the identified destination operand; and execution circuitry to execute the decoded instruction according to the opcode to convert packed half-precision floating-point data from the identified source to packed bfloat8 data and store the packed bfloat8 data into corresponding data element positions.

Abstract: Techniques for converting FP16 to BF8 using bias are described.

Abstract: Methods and apparatus for approximation using polynomial functions are disclosed. In one embodiment, a processor comprises decoding and execution circuitry. The decoding circuitry is to decode an instruction, where the instruction comprises a first operand specifying an output location and a second operand specifying a plurality of data element values to be computed. The execution circuitry is to execute the decoded instruction. The execution includes to compute a result for each of the plurality of data element values using a polynomial function to approximate a complex function, where the computation uses coefficients stored in a lookup location for the complex function, and where data element values within different data element value ranges use different sets of coefficients. The execution further includes to store results of the computation in the output location.