Patents by Inventor Christopher A. Sharp

Christopher A. Sharp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8937622
    Abstract: This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: January 20, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Alexei V. Bourd, Colin Christopher Sharp, David Rigel Garcia Garcia, Chihong Zhang
  • Patent number: 8931108
    Abstract: A graphics processing unit (GPU) is configured to access a first memory unit according to one of an unsecure mode and a secure mode. The GPU may include a memory access controller configured to allow the GPU to read data from only an unsecure portion of the first memory unit when the GPU is in the unsecure mode, and configured to allow the GPU to write data only to a secure portion of the first memory unit when the GPU is in the secure mode.
    Type: Grant
    Filed: February 18, 2013
    Date of Patent: January 6, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Colin Christopher Sharp, Sudeep Ravi Kottilingal, Thomas Edwin Frisinger, Andrew E. Gruber
  • Publication number: 20140331023
    Abstract: A device includes a memory that stores a first page table that includes a first page table entry, wherein the first page table entry further includes a physical address, an alternative location associated with the page table entry, and a physical page of memory associated with the physical address. A first processing unit is configured to: read the first page table entry, and determine the physical address from the first page table entry. The second processing unit is configured to: read the physical address from the first page table entry, determine second page attribute data from the alternative location, wherein the second page attribute data define one or more accessibility attributes of the physical page of memory for the second processing unit, and access the physical page of memory associated with the physical address according to the one or more accessibility attributes.
    Type: Application
    Filed: May 6, 2013
    Publication date: November 6, 2014
    Applicant: Qualcomm Incorporated
    Inventors: Colin Christopher Sharp, Thomas Andrew Sartorius
  • Publication number: 20140237609
    Abstract: This disclosure proposes techniques for graphics processing. In one example, a graphics processing unit (GPU) is configured to access a first memory unit according to one of an unsecure mode and a secure mode. The GPU comprises a memory access controller configured to allow the GPU to read data from only an unsecure portion of the first memory unit when the GPU is in the unsecure mode, and configured to allow the GPU to write data only to a secure portion of the first memory unit when the GPU is in the secure mode.
    Type: Application
    Filed: February 18, 2013
    Publication date: August 21, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventors: Colin Christopher Sharp, Sudeep Ravi Kottilingal, Thomas Edwin Frisinger, Andrew E. Gruber
  • Publication number: 20140075060
    Abstract: This disclosure proposes techniques for demand paging for an IO device (e.g., a GPU) that utilize pre-fetch and pre-back notification event signaling to reduce latency associated with demand paging. Page faults are limited by performing the demand paging operations prior to the IO device actually requesting unbacked memory.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 13, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventors: Colin Christopher Sharp, David Rigel Garcia Garcia, Eduardus A Metz
  • Patent number: 8656939
    Abstract: Disclosed is an apparatus for sealing and severing a subsea pipe adapted to convey fluids, e.g., hydrocarbons, and systems and methods using such apparatus. The apparatus includes a housing adapted to attach to the pipe, a piercing tool for providing an opening in the pipe at a predetermined location and a mechanism for establishing fluid communication between a source of sealant material and space within the pipe adjacent the opening in the pipe, and a cutting mechanism for cutting the pipe. Methods disclosed include piercing the pipe to form an opening, injecting sealant material through the opening into the pipe to form a fluid-tight seal, and cutting the pipe through the seal to form sealed cut ends.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: February 25, 2014
    Assignee: Chevron U.S.A. Inc.
    Inventors: Jarred Christopher Sharp, Scott Oren Crook, Jimmie Dean Adkins, Daniel Christopher Kefford, Edward Shintaro Nakajima, Jean Michael Thibodeaux
  • Publication number: 20140040593
    Abstract: A first processing unit and a second processing unit can access a system memory that stores a common page table that is common to the first processing unit and the second processing unit. The common page table can store virtual memory addresses to physical memory addresses mapping for memory chunks accessed by a job of an application. A page entry, within the common page table, can include a first set of attribute bits that defines accessibility of the memory chunk by the first processing unit, a second set of attribute bits that defines accessibility of the same memory chunk by the second processing unit, and physical address bits that define a physical address of the memory chunk.
    Type: Application
    Filed: August 2, 2012
    Publication date: February 6, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventors: Colin Christopher Sharp, Thomas Andrew Sartorius
  • Publication number: 20140040552
    Abstract: A method includes storing, with a first programmable processor, shared variable data to cache lines of a first cache of the first processor. The method further includes executing, with the first programmable processor, a store-with-release operation, executing, with a second programmable processor, a load-with-acquire operation, and loading, with the second programmable processor, the value of the shared variable data from a cache of the second programmable processor.
    Type: Application
    Filed: August 2, 2013
    Publication date: February 6, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Bohuslav Rychlik, Tzung Ren Tzeng, Andrew Evan Gruber, Alexei V. Bourd, Colin Christopher Sharp, Eric Demers
  • Publication number: 20140022266
    Abstract: This disclosure is directed to deferred preemption techniques for scheduling graphics processing unit (GPU) command streams for execution on a GPU. A host CPU is described that is configured to control a GPU to perform deferred-preemption scheduling. For example, a host CPU may select one or more locations in a GPU command stream as being one or more locations at which preemption is allowed to occur in response to receiving a preemption notification, and may place one or more tokens in the GPU command stream based on the selected one or more locations. The tokens may indicate to the GPU that preemption is allowed to occur at the selected one or more locations. This disclosure further describes a GPU configured to preempt execution of a GPU command stream based on one or more tokens placed in a GPU command stream.
    Type: Application
    Filed: July 20, 2012
    Publication date: January 23, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventors: Eduardus A Metz, Nigel Terence Poole, Colin Christopher Sharp, Andrew Gruber
  • Publication number: 20130220436
    Abstract: Disclosed is an apparatus for sealing and severing a subsea pipe adapted to convey fluids, e.g., hydrocarbons, and systems and methods using such apparatus. The apparatus includes a housing adapted to attach to the pipe, a piercing tool for providing an opening in the pipe at a predetermined location and a mechanism for establishing fluid communication between a source of sealant material and space within the pipe adjacent the opening in the pipe, and a cutting mechanism for cutting the pipe. Methods disclosed include piercing the pipe to form an opening, injecting sealant material through the opening into the pipe to form a fluid-tight seal, and cutting the pipe through the seal to form sealed cut ends.
    Type: Application
    Filed: February 29, 2012
    Publication date: August 29, 2013
    Applicant: Chevron U.S.A. Inc.
    Inventors: Jarred Christopher Sharp, Scott Oren Crook, Jimmie Dean Adkins, Daniel Christopher Kefford, Edward Shintaro Nakajima, Jean Michael Thibodeaux
  • Publication number: 20120297012
    Abstract: A system includes a server site that includes a memory for storing update data sets that correspond to data sets stored on multiple computing devices of a user. The system also includes a synchronization manager for determining that one computing device associated with the user and another computing device associated with the user are absent one or more data updates stored in the memory at the server site. The synchronization manager is configured to send in parallel, absent establishing a data transfer lock, the one or more data updates to the both computing devices of the user for updating the corresponding data stored on each computing device.
    Type: Application
    Filed: July 30, 2012
    Publication date: November 22, 2012
    Applicant: APPLE INC.
    Inventors: Christopher Sharp, Karl Groethe, Andy Belk, Stu Slack
  • Patent number: 8210442
    Abstract: A system and method for conserving water in a hot and cold water system collects hot water that is discharged prior to the water reaching a desired temperature. A receptacle is disposed for receipt of cold and hot water from a water system, and a drain line is configured with the receptacle to drain water from the receptacle to a first collection site. A diverter valve is configured in the drain line and operates between a first position wherein water from the receptacle is directed to the first collection site, and a second position wherein water from the receptacle is directed to a branch line. A temperature activated valve is provided, and a second collection site disposed downstream of the temperature activated valve.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: July 3, 2012
    Inventor: Christopher Sharp Bondura
  • Publication number: 20120069035
    Abstract: This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 22, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: Alexei V. Bourd, Colin Christopher Sharp, David Rigel Garcia Garcia, Chihong Zhang
  • Publication number: 20120069029
    Abstract: This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 22, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: Alexei V. Bourd, Colin Christopher Sharp, David Rigel Garcia Garcia, Chihong Zhang
  • Patent number: 8083224
    Abstract: A tray assembly for a print production resource may include a tray and a guide assembly. The guide assembly may include a first width guide configured to contact a first side of a media stack at a first location below a top sheet of the media stack such that a first distance exists between the top sheet and the first width guide. The guide assembly may include a second width guide configured to contact a second side of the media stack at a second location below the top sheet of the media stack such that a second distance exists between the top sheet of the media stack and the second width guide. The first side may be opposite the second side, and the tray assembly may be configured to be utilized with a top sheet feeder mechanism.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 27, 2011
    Assignee: Xerox Corporation
    Inventors: Richard Thomas Calhoun Bridges, Christopher Sharp
  • Publication number: 20100332682
    Abstract: A system includes a server site that includes a memory for storing update data sets that correspond to data sets stored on multiple computing devices of a user. The system also includes a synchronization manager for determining that one computing device associated with the user and another computing device associated with the user are absent one or more data updates stored in the memory at the server site. The synchronization manager is configured to send in parallel, absent establishing a data transfer lock, the one or more data updates to the both computing devices of the user for updating the corresponding data stored on each computing device.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventors: Christopher Sharp, Karl Groethe, Andy Belk, Stuart Slack
  • Publication number: 20100270734
    Abstract: A tray assembly for a print production resource may include a tray and a guide assembly. The guide assembly may include a first width guide configured to contact a first side of a media stack at a first location below a top sheet of the media stack such that a first distance exists between the top sheet and the first width guide. The guide assembly may include a second width guide configured to contact a second side of the media stack at a second location below the top sheet of the media stack such that a second distance exists between the top sheet of the media stack and the second width guide. The first side may be opposite the second side, and the tray assembly may be configured to be utilized with a top sheet feeder mechanism.
    Type: Application
    Filed: April 22, 2009
    Publication date: October 28, 2010
    Applicant: XEROX CORPORATION
    Inventors: Richard Thomas Calhoun Bridges, Christopher Sharp
  • Publication number: 20100193049
    Abstract: A system and method for conserving water in a hot and cold water system collects hot water that is discharged prior to the water reaching a desired temperature. A receptacle is disposed for receipt of cold and hot water from a water system, and a drain line is configured with the receptacle to drain water from the receptacle to a first collection site. A diverter valve is configured in the drain line and operates between a first position wherein water from the receptacle is directed to the first collection site, and a second position wherein water from the receptacle is directed to a branch line. A temperature activated valve is provided, and a second collection site disposed downstream of the temperature activated valve.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 5, 2010
    Inventor: Christopher Sharp Bondura
  • Patent number: 7550126
    Abstract: Various methods and systems for augmenting the amount of NOX in the exhaust of an exhaust flow simulation system. These methods and system can be “combustion” or “post combustion”. A combustion embodiment injects a nitrogen-containing compound (doping agent) into the burner, so that it mixed and combusted with the fuel.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: June 23, 2009
    Assignee: Southwest Research Institute
    Inventors: Cynthia C. Webb, Christopher A. Sharp
  • Publication number: 20080178574
    Abstract: Various methods and systems for augmenting the amount of NOX in the exhaust of an exhaust flow simulation system. These methods and system can be “combustion” or “post combustion”. A combustion embodiment injects a nitrogen-containing compound (doping agent) into the burner, so that it mixed and combusted with the fuel.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Inventors: Cynthia C. Webb, Christopher A. Sharp