Abstract: An ordering system includes a plurality of ticket order release bitmap blocks that together store a ticket order release bitmap, a bus and a Global Reordering Block (GRO). Each Ticket Order Release Bitmap Block (TORBB) stores a different part of the ticket order release bitmap. A first TORBB of the plurality of TORBBs is protected. The GRO 1) receives a queue entry onto the ordering system from a thread, 2) receives a ticket release command from the thread, and in response 3) outputs a return data of ticket release command. The queue entry includes a first sequence number. The return data of ticket release command indicates if a bit in the protected TORBB was set. An error code is included in the return data of ticket release command if a bit is set within the protected TORBB. When a bit in the TORBB is set the thread stops processing packets.

Abstract: An ordering system receives release requests to release packets, where each packet has an associated sequence number, but the system only releases packets sequentially in accordance with the sequence numbers. The system includes a Ticket Order Release Command Dispatcher And Sequence Number Translator (TORCDSNT) and a plurality of Ticket Order Release Bitmap Blocks (TORBBs). The TORBBs are stored in one or more transactional memories. In response to receiving release requests, the TORCDSNT issues atomic ticket release commands to the transactional memory or memories, and uses the multiple TORBBs in a chained manner to implement a larger overall ticket release bitmap than could otherwise be supported by any one of the TORBBs individually. Special use of one flag bit position in each TORBB facilitates this chaining. In one example, the system is implemented in a network flow processor so that the TORBBs are maintained in transactional memories spread across the chip.

Abstract: An Island-Based Network Flow Processor (IB-NFP) receives packets of many flows, and classifies them as belonging to an ordering context. These packets are distributed to a set of Worker Processors (WPs), so that each packet of the context is processed by one WP, but multiple WPs operate on packets of the context at a given time. The WPs use an atomic ticket release functionality of a transactional memory to assist in determining when to release packets to another set of Output Processors (OP). The packets are indicated to the set of OPs in the correct order, even though the WPs may complete their processing of the packets in an out-of-order fashion. For a packet that is indicated as to be released, an OP generates a “transmit command” such that the packet (or a descriptor of the packet) is then put into a properly ordered stream for output from the IB-NFP.

Abstract: An Island-Based Network Flow Processor (IB-NFP) receives packets of many flows, and classifies each packet as belonging to one of a plurality of ordering contexts. As packets of an ordering context flow through the IB-NFP they are distributed to a set of Worker Processors (WPs). Each packet is processed by one WP, but multiple WPs are typically operating on packets of the ordering context at the same time. The ordering system handles releasing packets from the WPs to set of Output Processors (OP) in the correct order, even though WPs may complete their processing in an out-of-order fashion. One OP is responsible for generating “transmit commands” for packets of the ordering context. This OP generates a transmit command in the correct format as required by the particular egress destination circuit through which the packet will exit the IB-NFP. This architecture reduces code space, and facilitates good usage of processing resources.