Abstract: An antenna, including a radiating element configured to have a fundamental resonance frequency being regarded as a first harmonic resonance frequency fo, and feed points positioned on the configured radiating element at selected multiple locations that correspond to where a multiple of the first harmonic resonance frequency have current maxima, wherein feeds at the feed points cooperate at an operating frequency of the antenna to constructively combine their respective antenna radiation patterns.

Abstract: Embodiments are directed to a flexible substrate, and an end-fire antenna array mounted on the flexible substrate, wherein the flexible substrate is configured to be oriented so that array gain is oriented in a direction perpendicular to a plane of the flexible substrate. Embodiments are directed to mounting an end-fire antenna array on a flexible substrate, and orienting the flexible substrate so that array gain is oriented in a direction perpendicular to a plane of the flexible substrate.

Abstract: A user equipment and a wireless radio frequency assistant in a communication system that supports multiple input multiple output. The wireless radio frequency assistant and the user equipment operate together as a single system. The user equipment controls and activates the wireless radio frequency assistant to transform a first frequency of a radio frequency signal transmitted to the system of user equipment and the wireless radio frequency assistant to a second frequency. The wireless radio frequency assistant transmits the second frequency to the user equipment.

Abstract: Embodiments are directed to a transition structure for interfacing an integrated circuit chip and a substrate, comprising: a co-planar waveguide (CPW) structure formed based on ground-signal-ground (GSG) pads on the integrated circuit chip, a grounded co-planar waveguide (CPWG) structure coupled to the GSG pads, and a microstrip coupled to the CPWG structure.

Abstract: Embodiments are directed to a structure comprising: a first substrate section having a first thickness, a second substrate section having a second thickness different from the first thickness, a plurality of vias configured to couple a first ground plane associated with the first substrate section and a second ground plane associated with the second substrate section, and a microstrip comprising: a first section associated with the first substrate section and having a first width, a second section associated with the second substrate section and having a second width different from the first width, and a taper between the first width and the second width.

Abstract: Embodiments are directed to a transition structure for interfacing an integrated circuit chip and a substrate, comprising: a co-planar waveguide (CPW) structure formed based on ground-signal-ground (GSG) pads on the integrated circuit chip, a grounded co-planar waveguide (CPWG) structure coupled to the GSG pads, and a microstrip coupled to the CPWG structure.

Abstract: A radio frequency front end of a receiver including a tunable filter receiving a signal; a controller for tuning the tunable filter; and an interference detection circuit configured to detect interference and provide an input to a controller, wherein the controller tunes the tunable filter based on the input from the interference detection circuit. Also a method for removing interference at a radio frequency front end of a receiver, the method detecting interference at an interference detection circuit; and tuning at least one tunable filter to at least one frequency of the detected interference.

Abstract: An antenna, including a radiating element configured to have a fundamental resonance frequency being regarded as a first harmonic resonance frequency fo, and feed points positioned on the configured radiating element at selected multiple locations that correspond to where a multiple of the first harmonic resonance frequency have current maxima, wherein feeds at the feed points cooperate at an operating frequency of the antenna to constructively combine their respective antenna radiation patterns.

Abstract: Embodiments are directed to a flexible substrate, and an end-fire antenna array mounted on the flexible substrate, wherein the flexible substrate is configured to be oriented so that array gain is oriented in a direction perpendicular to a plane of the flexible substrate. Embodiments are directed to mounting an end-fire antenna array on a flexible substrate, and orienting the flexible substrate so that array gain is oriented in a direction perpendicular to a plane of the flexible substrate.

Abstract: Methods, devices and systems for sensor-based wireless communication systems using compressive sampling are provided. In one embodiment, the method for sampling signals comprises receiving, over a wireless channel, a user equipment transmission based on an S-sparse combination of a set of vectors; down converting and discretizing the received transmission to create a discretized signal; correlating the discretized signal with a set of sense waveforms to create a set of samples, wherein a total number of samples in the set is equal to a total number of sense waveforms in the set, wherein the set of sense waveforms does not match the set of vectors, and wherein the total number of sense waveforms in the set of sense waveforms is fewer than a total number of vectors in the set of vectors; and transmitting at least one sample of the set of samples to a remote central processor.

Abstract: A user equipment and a wireless radio frequency assistant in a communication system that supports multiple input multiple output. The wireless radio frequency assistant and the user equipment operate together as a single system. The user equipment controls and activates the wireless radio frequency assistant to transform a first frequency of a radio frequency signal transmitted to the system of user equipment and the wireless radio frequency assistant to a second frequency. The wireless radio frequency assistant transmits the second frequency to the user equipment.

Abstract: Methods, devices and systems for sensor-based wireless communication systems using compressive sampling are provided. In one embodiment, the method for sampling signals comprises receiving, over a wireless channel, a user equipment transmission based on an S-sparse combination of a set of vectors; down converting and discretizing the received transmission to create a discretized signal; correlating the discretized signal with a set of sense waveforms to create a set of samples, wherein a total number of samples in the set is equal to a total number of sense waveforms in the set, wherein the set of sense waveforms does not match the set of vectors, and wherein the total number of sense waveforms in the set of sense waveforms is fewer than a total number of vectors in the set of vectors; and transmitting at least one sample of the set of samples to a remote central processor.

Abstract: An improved receiver architecture and method for a wireless transceiver (e.g. for a headphone) is provided whereby the receiver, advantageously, enables the use of only one synthesizer circuit for both the RF-to-IF and IF-to-base band conversion processes which, in turn, provides for lower power consumption. The receiver includes an injection locked local receiver oscillator (Rx LO) which is used for the first mixing stage (i.e. the RF-to-IF conversion). The Rx LO 105 is thereby able to use a high-level harmonic of a relatively low reference frequency signal produced by that synthesizer (e.g. a fractional-N phase locked loop circuit (PLL)). The receiver further includes a tunable Q-enhanced IF filter 110 and complex sub-sampling and mixing down-conversion circuitry for the second conversion stage (i.e. IF-to-baseband conversion). The sampling frequency used for the second conversion stage is a harmonic of the reference frequency derived from the synthesizer (PLL).

Abstract: The invention relates to the field of electronics and more particularly to the tuning and injection locking of voltage controlled oscillators (VCOs). An improved injection locking circuit is provided which allows the VCO to injection lock with a smaller reference signal and therefore a smaller locking bandwidth (LBW). In order to allow the VCO to injection lock with a lower power reference signal, this invention includes a pre-tuning algorithm to place the VCO frequency such that the desired frequency is in the LBW. Tuning of the VCO is achieved using direct digital tuning that does not require an input reference. Injection locking is performed using a low frequency clock harmonic as the reference signal. More specifically, tuning is accomplished by sub-sampling and digitizing the output signal of the VCO, determining the center frequency, and adjusting the VCO control voltage.

Abstract: A power down system and method for an integrated circuit that enables a power down mode to be maintained for a predetermined time is described herein. The power down system comprises an oscillator, a low power oscillator and an oscillator control circuit controlling both the oscillator and the low power oscillator. The oscillator control circuit including at least one real time counter. The oscillator control circuit being so configured that the oscillator is energized when said oscillator control circuit is in a normal mode and that, when a power down signal is received: a) the oscillator control circuit measures an oscillation frequency of the low power oscillator, b) the oscillator control circuit uses the measured oscillation frequency of the low power oscillator to set the real time counter so as to maintain the power down mode for the predetermined time, c) the oscillator control circuit turns off the oscillator and uses the low power oscillator for the duration of the power down.

Abstract: The invention relates to electronic “sample and hold” circuits and, in particular, to such circuits which may implemented in integrated form. A method and circuit are provided for improving isolation during the hold mode of operation of a sampling circuit. An input differential signal is provided to parallel circuit paths (viz. a primary sampling path and an isolation path) which are identical (electronically equivalent) and, therefore, provide the same impedance leading to hold capacitor(s). The circuit paths are configured, relative to the differential inputs, so that any feed through (leakage) of the differential input signal is subtracted (cancelled) during the hold mode.

Abstract: A power down system and method for an integrated circuit that enables a power down mode to be maintained for a predetermined time is described herein. The power down system comprises an oscillator, a low power oscillator and an oscillator control circuit controlling both the oscillator and the low power oscillator. The oscillator control circuit including at least one real time counter. The oscillator control circuit being so configured that the oscillator is energized when said oscillator control circuit is in a normal mode and that, when a power down signal is received: a) the oscillator control circuit measures an oscillation frequency of the low power oscillator, b) the oscillator control circuit uses the measured oscillation frequency of the low power oscillator to set the real time counter so as to maintain the power down mode for the predetermined time, c) the oscillator control circuit turns off the oscillator and uses the low power oscillator for the duration of the power down.

Abstract: The invention relates to the field of electronics and more particularly to the tuning and injection locking of voltage controlled oscillators (VCOs). An improved injection locking circuit is provided which allows the VCO to injection lock with a smaller reference signal and therefore a smaller locking bandwidth (LBW). In order to allow the VCO to injection lock with a lower power reference signal, this invention includes a pre-tuning algorithm to place the VCO frequency such that the desired frequency is in the LBW. Tuning of the VCO is achieved using direct digital tuning that does not require an input reference. Injection locking is performed using a low frequency clock harmonic as the reference signal. More specifically, tuning is accomplished by sub-sampling and digitizing the output signal of the VCO, determining the center frequency, and adjusting the VCO control voltage.

Abstract: The invention relates to the field of microelectronics, more particularly to the structure and layout of integrated circuit capacitors. An integrated circuit capacitor is provided comprising: a first conductive component comprising a plurality of digital sub-components; and a second conductive component comprising a plurality of digital sub-components; wherein the digital sub-components of the first and second conductive components are interleaved and parallel, with a narrow uniform distance therebetween; and wherein the orientation of the interleaved digital sub-components is symmetrical about the center of the integrated circuit capacitor. This symmetrical orientation aids in the creation of a capacitor with well-matched top and bottom plates and capacitor pairs that have well-defined ratios. The arrangement serves to minimize the photolithographic variations by averaging the offsets caused by the different lithographic traces.

Abstract: The invention relates to electronic “sample and hold” circuits and, in particular, to such circuits which may implemented in integrated form. A method and circuit are provided for improving isolation during the hold mode of operation of a sampling circuit. An input differential signal is provided to parallel circuit paths (viz. a primary sampling path and an isolation path) which are identical (electronically equivalent) and, therefore, provide the same impedance leading to hold capacitor(s). The circuit paths are configured, relative to the differential inputs, so that any feed through (leakage) of the differential input signal is subtracted (cancelled) during the hold mode.