Patents by Inventor Christopher Auth

Christopher Auth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11248859
    Abstract: An improved water management system with improved airflow distribution for counterflow evaporative heat exchangers is provided. Such heat exchangers include open cooling towers, closed circuit cooling towers, and evaporative condensers. The improved water management system eliminates water splash out and the noise associated with water splashing. Further when the fan assemblies are located below the evaporative heat exchanger, the improved water management system keeps the fans dry and prevents freezing in subzero climates.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: February 15, 2022
    Assignee: Baltimore Aircoil Company, Inc.
    Inventors: Christopher Auth, Yohann Rousselet, Dina Malamud, Kevin Egolf, Lukasz Sztobryn
  • Publication number: 20200256629
    Abstract: An improved water management system with improved airflow distribution for counterflow evaporative heat exchangers is provided. Such heat exchangers include open cooling towers, closed circuit cooling towers, and evaporative condensers. The improved water management system eliminates water splash out and the noise associated with water splashing. Further when the fan assemblies are located below the evaporative heat exchanger, the improved water management system keeps the fans dry and prevents freezing in subzero climates.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 13, 2020
    Inventors: Christopher Auth, Yohann Rousselet, Dina Malamud, Kevin Egolf, Lukasz Sztobryn
  • Patent number: 10677543
    Abstract: An improved water management system with improved airflow distribution for counterflow evaporative heat exchangers is provided. Such heat exchangers include open cooling towers, closed circuit cooling towers, and evaporative condensers. The improved water management system eliminates water splash out and the noise associated with water splashing. Further when the fan assemblies are located below the evaporative heat exchanger, the improved water management system keeps the fans dry and prevents freezing in subzero climates.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: June 9, 2020
    Assignee: Baltimore Aircoil Company, Inc.
    Inventors: Christopher Auth, Yohann Rousselet, Dina Malamud, Kevin Egolf, Lukasz Sztobryn
  • Publication number: 20190063855
    Abstract: An improved water management system with improved airflow distribution for counterflow evaporative heat exchangers is provided. Such heat exchangers include open cooling towers, closed circuit cooling towers, and evaporative condensers. The improved water management system eliminates water splash out and the noise associated with water splashing. Further when the fan assemblies are located below the evaporative heat exchanger, the improved water management system keeps the fans dry and prevents freezing in subzero climates.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 28, 2019
    Inventors: Christopher Auth, Yohann Rousselet, Dina Malamud, Kevin Egolf, Lukasz Sztobryn
  • Patent number: 7861406
    Abstract: Methods and associated structures of forming a microelectronic device are described. Those methods may include amorphizing at least one contact area of a source/drain region of a transistor structure by implanting through at least one contact opening, forming a first layer of metal on the at least one contact area, forming a second layer of metal on the first layer of metal, selectively etching a portion of the second metal layer, annealing the at least one contact area to form at least one silicide, and removing the unreacted first metal layer and second metal layer from the transistor structure and forming a conductive material in the at least one contact opening.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: January 4, 2011
    Assignee: Intel Corporation
    Inventors: Saurabh Lodha, Pushkar Ranade, Christopher Auth
  • Patent number: 7691752
    Abstract: Methods and associated structures of forming a microelectronic device are described. Those methods may include plasma etching a portion of a source/drain region of a transistor, and then selectively wet etching the source drain region along a (100) plane to form at least one (111) region in the recessed source/drain region.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventors: Pushkar Ranade, Keith Zawadzki, Christopher Auth
  • Publication number: 20080311720
    Abstract: A method of forming a transistor comprising: defining undercut recesses in the substrate at the source/drain regions thereof, the undercut recesses extending beneath the gate electrode; creating a halo implant region beneath the gate electrode between the recesses; and providing raised source/drain structures in the undercut recesses after creating the halo implant region.
    Type: Application
    Filed: July 11, 2008
    Publication date: December 18, 2008
    Inventors: Thomas Hoffman, Sunit Tyagi, Giuseppe Curello, Berhard Sell, Christopher Auth
  • Publication number: 20080237742
    Abstract: Methods and associated structures of forming a microelectronic device are described. Those methods may include plasma etching a portion of a source/drain region of a transistor, and then selectively wet etching the source drain region along a (100) plane to form at least one (111) region in the recessed source/drain region.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Pushkar Ranade, Keith Zawadzki, Christopher Auth
  • Publication number: 20080237603
    Abstract: Methods and associated structures of forming a microelectronic device are described. Those methods may include amorphizing at least one contact area of a source/drain region of a transistor structure by implanting through at least one contact opening, forming a first layer of metal on the at least one contact area, forming a second layer of metal on the first layer of metal, selectively etching a portion of the second metal layer, and annealing the at least one contact area to form at least one silicide.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Inventors: Saurabh Lodha, Pushkar Ranade, Christopher Auth
  • Publication number: 20080237741
    Abstract: Methods and associated structures of forming a microelectronic device are described. Those methods may include plasma etching a portion of a source/drain region of a transistor, and then selectively wet etching the source drain region along a (100) plane to form at least one (111) region in the recessed source/drain region.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Pushkar Ranade, Keith Zawadzki, Christopher Auth
  • Publication number: 20070034945
    Abstract: Optimal strain in the channel region of a PMOS transistor is provided by silicon alloy material in the junction regions of the device in a non-planar relationship with the surface of the substrate. The silicon alloy material, the dimensions of the silicon alloy material, as well as the non-planar relationship of the silicon alloy material with the surface of the substrate are selected so that the difference between the lattice spacing of the silicon alloy material and of the substrate causes strains in the silicon alloy material below the substrate surface, as well as above the substrate surface, to affect an optimal silicon alloy induced strain in the substrate channel. In addition, the non-planar relationship may be selected so that any strains caused by different lattice spaced layers formed over the silicon alloy material have a reduced effect on the strain in the channel region.
    Type: Application
    Filed: October 24, 2006
    Publication date: February 15, 2007
    Inventors: Mark Bohr, Tahir Ghani, Stephen Cea, Kaizad Mistry, Christopher Auth, Mark Armstrong, Keith Zawadzki
  • Publication number: 20060065937
    Abstract: A method of providing a halo implant region in a substrate of a MOS device having a gate electrode thereon and defining source/drain regions, a MOS device fabricated according to the above method, and a system comprising the MOS device. The method comprises: defining undercut recesses in the substrate at the source/drain regions thereof, the undercut recesses extending beneath the gate electrode; creating a halo implant region beneath the gate electrode between the recesses; and providing raised source/drain structures in the undercut recesses after creating the halo implant region.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 30, 2006
    Inventors: Thomas Hoffmann, Sunit Tyagi, Giuseppe Curello, Berhard Sell, Christopher Auth
  • Publication number: 20050104057
    Abstract: An intentional recess or indentation is created in a region of semiconductor material that will become part of a channel of a metal oxide semiconductor (MOS) transistor structure. A layer is created on a surface of the recess to induce an appropriate type of stress in the channel.
    Type: Application
    Filed: December 27, 2004
    Publication date: May 19, 2005
    Inventors: M. Shaheed, Thomas Hoffmann, Mark Armstrong, Christopher Auth