Patents by Inventor Christopher BARTHOLOMEUSZ

Christopher BARTHOLOMEUSZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10447160
    Abstract: A circuit generates an output voltage from an input voltage and includes a Pulse Width Modulation (PWM) controller. The PWM controller initiates a PWM pulse according to a first comparison that uses a Current Sense and Ramp (CSR) signal and an error signal. The PWM controller ends the PWM pulse according to a second comparison that uses the CSR signal and a threshold signal. The CSR signal is generated using a current sense signal and a ramp signal according to the input voltage. The error signal is generated from the output voltage and a reference voltage. In an embodiment, the circuit is one of a plurality of substantially identical modules, wherein one module is a master module. The master module generates an error signal used by each module. A clock input of each module is respectively connected to a clock output of another module to sequentially activate each of the modules.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: October 15, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Gang Chen, Gabor Reizik, Christopher Bartholomeusz
  • Publication number: 20180337599
    Abstract: A circuit generates an output voltage from an input voltage and includes a Pulse Width Modulation (PWM) controller. The PWM controller initiates a PWM pulse according to a first comparison that uses a Current Sense and Ramp (CSR) signal and an error signal. The PWM controller ends the PWM pulse according to a second comparison that uses the CSR signal and a threshold signal. The CSR signal is generated using a current sense signal and a ramp signal according to the input voltage. The error signal is generated from the output voltage and a reference voltage. In an embodiment, the circuit is one of a plurality of substantially identical modules, wherein one module is a master module. The master module generates an error signal used by each module. A clock input of each module is respectively connected to a clock output of another module to sequentially activate each of the modules.
    Type: Application
    Filed: March 30, 2018
    Publication date: November 22, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Gang CHEN, Gabor REIZIK, Christopher BARTHOLOMEUSZ