Abstract: An apparatus includes a transient voltage suppression (TVS) device configured to be coupled in parallel with a burden resistor. The apparatus also includes a switch configured to couple the TVS device across the burden resistor. The apparatus further includes a comparator configured to detect a peak output voltage provided by a circuit, determine whether the peak output voltage meets or exceeds a threshold, and control the switch based on whether the peak output voltage meets or exceeds the threshold.

Abstract: A frequency sensor system for a three-phase generator includes a first stage that receives all three phases of the three-phase generator and generates three scaled difference signals from them. The system also includes a summing and filtering stage, the summing and filtering stage combining the three scaled difference signals to form a single combined signal and the filtering the single combined signal with an active filter to produce a filtered combined signal. The system also includes a gain stage that amplifies the filtered combined signal to form an amplified filtered combined signal and a comparator that converts the amplified filtered combined signal into a digital output having a frequency that matches a frequency of the amplified filtered combined signal.

Abstract: A frequency sensor system for a three-phase generator includes a first stage that receives all three phases of the three-phase generator and generates three scaled difference signals from them. The system also includes a summing and filtering stage, the summing and filtering stage combining the three scaled difference signals to form a single combined signal and the filtering the single combined signal with an active filter to produce a filtered combined signal. The system also includes a gain stage that amplifies the filtered combined signal to form an amplified filtered combined signal and a comparator that converts the amplified filtered combined signal into a digital output having a frequency that matches a frequency of the amplified filtered combined signal.

Abstract: A logic gate system for fault insertion testing can include a logic gate module having a plurality of input pins. The plurality of input pins can include an input signal pin configured to receive an input signal, a power supply input pin configured to receive power from a power supply, and a test input pin. The logic gate module can also include an output pin connected to the input pins via one or more logic gates. The logic gate system can include a power supply line connected to the power supply input pin and the test input pin. The logic gate system can also include a zero-ohm jumper resistor disposed between the power supply input pin and the test input pin. The zero-ohm resistor can be configured to be replaced with a low ohm resistor to allow reverse driving a voltage on the test input pin. The one or more logic gates can be configured to reverse an output at the output pin when the voltage on the test input pin is reverse driven.

Abstract: A logic gate system for fault insertion testing can include a logic gate module having a plurality of input pins. The plurality of input pins can include an input signal pin configured to receive an input signal, a power supply input pin configured to receive power from a power supply, and a test input pin. The logic gate module can also include an output pin connected to the input pins via one or more logic gates. The logic gate system can include a power supply line connected to the power supply input pin and the test input pin. The logic gate system can also include a zero-ohm jumper resistor disposed between the power supply input pin and the test input pin. The zero-ohm resistor can be configured to be replaced with a low ohm resistor to allow reverse driving a voltage on the test input pin. The one or more logic gates can be configured to reverse an output at the output pin when the voltage on the test input pin is reverse driven.

Abstract: A power supply fault monitoring system can be configured to monitor for repetitive faulting of a power supply and to inhibit the power supply if repetitive faulting or a sufficiently long fault is detected. The system can include an input voltage monitor module configured to monitor input voltage to the power supply and output an input voltage status signal, an output voltage monitor module configured to monitor output voltage from the power supply and configured to output an output voltage status signal, and a fault monitor module operatively connected to the input voltage monitor module and the output voltage monitor module to receive the input voltage status signal and the output voltage status signal.

Abstract: A power supply fault monitoring system can be configured to monitor for repetitive faulting of a power supply and to inhibit the power supply if repetitive faulting or a sufficiently long fault is detected. The system can include an input voltage monitor module configured to monitor input voltage to the power supply and output an input voltage status signal, an output voltage monitor module configured to monitor output voltage from the power supply and configured to output an output voltage status signal, and a fault monitor module operatively connected to the input voltage monitor module and the output voltage monitor module to receive the input voltage status signal and the output voltage status signal.

Abstract: Provided are embodiments for a system including a zero-cross circuit. The system includes a first channel and a second channel Each channel includes a generator, a generator relay, and a bus tie relay. In addition, the system includes a zero-cross circuit, wherein the zero-cross circuit synchronizes the operation of the first and second channel, and at least one controller configured to control the operation of the first channel and the second channel based on an input from the zero-cross circuit. Also provided is a method for operating the zero-cross circuit with low phase delay. The method includes receiving an inverting input, receiving a non-inverting input, and comparing the inverting input and the non-inverting input. The method also includes receiving feedback from an output of the comparator; and outputting a waveform based on the comparison of the inverting input and the non-inverting input and the feedback.

Abstract: An input device includes an input line connected to a voltage divider node for connecting a load to the voltage divider node. A first switching component connects to the voltage divider node. A first resistor connects to the voltage divider node for connecting a first voltage source to the input line. A second resistor connects between the input line and the voltage divider node for limiting current to the load, wherein the first voltage source is also connected to the first switching component. A second switching component is operatively connected to the first switching component, wherein the second switching component is configured to connect an second voltage source to a logic device for discrete input to the logic device that is decoupled from voltage supplied to the input line by the first voltage source for providing logic high and low input regardless of voltage supplied by the first voltage source.

Abstract: An input device includes an input line connected to a voltage divider node for connecting a load to the voltage divider node. A first switching component connects to the voltage divider node. A first resistor connects to the voltage divider node for connecting a first voltage source to the input line. A second resistor connects between the input line and the voltage divider node for limiting current to the load, wherein the first voltage source is also connected to the first switching component. A second switching component is operatively connected to the first switching component, wherein the second switching component is configured to connect an second voltage source to a logic device for discrete input to the logic device that is decoupled from voltage supplied to the input line by the first voltage source for providing logic high and low input regardless of voltage supplied by the first voltage source.