Patents by Inventor Christopher Cenotti

Christopher Cenotti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12699620
    Abstract: A computing device and a method of performing crash analysis is provided. Each compute unit of an accelerated processor is configured to execute an application in a crash analysis operation mode, different from a normal operation mode, by executing a single instruction in isolation from any other instruction such that execution of the single instruction is completed prior to beginning execution of any of the other instructions. Examples of selectable crash analysis operation modes include a first mode in which execution of each memory instruction is completed prior to beginning execution of a next instruction, a second mode in which execution of each ALU instruction is completed prior to beginning execution of a next instruction, and a third mode in which execution of both memory and ALU instructions are completed prior to beginning execution of a next instruction.
    Type: Grant
    Filed: March 29, 2024
    Date of Patent: August 4, 2026
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Amit Ben-Moshe, Christopher Cenotti, Michael Lee Grossfeld, Serguei Sagalovitch, Budirijanto Purnomo
  • Publication number: 20250307058
    Abstract: A computing device and a method of performing crash analysis is provided. Each compute unit of an accelerated processor is configured to execute an application in a crash analysis operation mode, different from a normal operation mode, by executing a single instruction in isolation from any other instruction such that execution of the single instruction is completed prior to beginning execution of any of the other instructions. Examples of selectable crash analysis operation modes include a first mode in which execution of each memory instruction is completed prior to beginning execution of a next instruction, a second mode in which execution of each ALU instruction is completed prior to beginning execution of a next instruction, and a third mode in which execution of both memory and ALU instructions are completed prior to beginning execution of a next instruction.
    Type: Application
    Filed: March 29, 2024
    Publication date: October 2, 2025
    Applicants: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Amit Ben-Moshe, Christopher Cenotti, Michael Lee Grossfeld, Serguei Sagalovitch, Budirijanto Purnomo