Abstract: A data file comprising a plurality of rows, each of the rows includes at least a first column and a second column, the first column contains a first-level resource ID that identifies a first-level resource, the second column provides information regarding the first-level resource. For each respective unique first-level resource ID, the processing circuitry identifies a row set for the respective first-level resource ID, performs a sequential deduplication process on the row set, and enqueues remaining rows in a queue for a thread assigned to the respective first-level resource ID. For each row enqueued in the queue for the thread, the thread dequeues the row from the queue for the respective thread, requests creation of a second-level resource that stores a version of the data element contained in the second column of the dequeued row, and requests creation of relationship data for the second-level resource.

Abstract: A data file comprising a plurality of rows, each of the rows includes at least a first column and a second column, the first column contains a first-level resource ID that identifies a first-level resource, the second column provides information regarding the first-level resource. For each respective unique first-level resource ID, the processing circuitry identifies a row set for the respective first-level resource ID, performs a sequential deduplication process on the row set, and enqueues remaining rows in a queue for a thread assigned to the respective first-level resource ID. For each row enqueued in the queue for the thread, the thread dequeues the row from the queue for the respective thread, requests creation of a second-level resource that stores a version of the data element contained in the second column of the dequeued row, and requests creation of relationship data for the second-level resource.

Abstract: A smart face mask protects a user from harmful contaminants found in the user's environment. The face mask includes inlet and outlet filters to not only protect the user, but also other people within a vicinity of the user. The inlet and outlet filters include fans that promote proper air flow into and out of the mask. Air respiratory sensors provide accurate measurements of possible air contaminants. Sensors also collect data that is used to control and change fan speed operations. A mobile application controlled by the user is used to control operation of the face mask during use. Communications via short range wireless network 150s are provided between people via microphones, speakers, or earpieces. The face mask may be worn in shared spaces, indoor environments, or outdoor environments.

Abstract: An integrated circuit structure includes a first layer comprising a semiconductor material. In an example, the semiconductor material of the layer comprises an oxide semiconductor material (e.g., comprising a metal and oxygen). The integrated circuit structure further includes a second layer above the first layer, where the second layer includes a metal and one of oxygen or nitrogen (e.g., includes aluminum and oxygen). In an example, the second layer is an etch stop layer. In an example, the second layer has a thickness of at most 20 nanometers. The integrated circuit structure further includes a first source or drain terminal and a second source or drain terminal, where each of the first and second source or drain terminals extends through the second layer and is coupled to the first layer. In an example, the integrated circuit structure is a thin film transistor (TFT), where the first layer is a thin film channel structure of the TFT.

Abstract: An example device includes a user interface component that implements a user interface and receives a visualization request value from user operations; an inspection database comprising an aggregation of inspection data; and a controller, comprising: a facility planning circuit that interprets a user facility visualization value in response to the visualization request value; a facility inspection data circuit that interprets the aggregation of inspection data in response to the user facility visualization value; a geographic depiction circuit that determines a geographic display boundary and a hierarchical inspection presentation for at least one industrial facility positioned within the geographic display boundary in response to the user facility visualization value and the aggregation of inspection data, and determines a user geographic display value in response to the geographic display boundary and the hierarchical inspection presentation.

Abstract: A thin film transistor (TFT) structure. In an example, the TFT includes a gate electrode, a first layer comprising an oxide semiconductor material, and a second layer between the first layer and the gate electrode. The second layer is crystalline and is in contact with the first layer, and includes zirconium and oxygen. The TFT includes a first contact coupled to the first layer at a first location, and a second contact coupled to the first layer at a second location. In some cases, the second layer further includes hafnium. In some cases, the TFT includes a third layer between of the gate electrode and the second layer, the third layer comprising a metal and oxygen. The gate electrode may also include the metal. In some cases, hydrogen is present at an interface between the gate electrode and the second layer.

Abstract: An embodiment of a semiconductor apparatus may include technology to convert an analog voltage level of a memory cell of a multi-level memory to a multi-bit digital value, and determine a single-bit value of the memory cell based on the multi-bit digital value. Some embodiments may also include technology to track a temporal history of accesses to the memory cell for a duration in excess of ten seconds, and determine the single-bit value of the memory cell based on the multi-bit digital value and the temporal history. Other embodiments are disclosed and claimed.

Abstract: A method is described. The method includes monitoring reliability, power consumption and performance of a processor and writing reliability, power consumption and performance data of the processor into an embedded non-volatile random access memory that is integrated into the processor's semiconductor chip.

Abstract: A processor semiconductor chip is described. The processor semiconductor chip includes at least one processing core. The processor semiconductor chip also includes a memory controller. The processor semiconductor chip also includes an embedded non flash non-volatile random access memory having a stack of storage cells disposed above the processor semiconductor chip's semiconductor substrate. The embedded non-volatile random access memory is to store boot up program code that, when executed by the processor semiconductor chip, is to analyze a subsequent module of program code so that a maliciously modified version of the subsequent module of program code can be identified. The embedded non-volatile random access memory to also store the subsequent module of program code.

Abstract: Examples include techniques for booting a computing system. A processor semiconductor chip includes one or more processing cores and an embedded non-volatile random-access memory (NVRAM), the NVRAM storing instructions that when executed by the one or more processing cores manages a boot process for a computing system.

Abstract: A system and user interface capable of effectively manipulating high volumes of data is provided. The system and/or user interface is specially-configured to aggregate large data volumes and translate the large data volumes into summary information associated with navigable categorizations (e.g., categorizations linked to selectable visualizations in the user interface) that enable dynamic selection and visualization of portions of the large data volumes. In one particular example, the system and/or user interface is adapted to generate selectable panels having a plurality of build or editing tools displayed coextensive with portions of the large volumes of data. Such panels may be particularly useful for generating a placement (e.g., an advertisement) while reviewing or managing large amounts of information, such as ad placement and performance information for hundreds or thousands or advertisements.

Abstract: A processor semiconductor chip is described. The processor semiconductor chip includes at least one processing core. The processor semiconductor chip also includes a memory controller. The processor semiconductor chip also includes an embedded non flash non-volatile random access memory having a stack of storage cells disposed above the processor semiconductor chip's semiconductor substrate. The embedded non-volatile random access memory is to store boot up program code that, when executed by the processor semiconductor chip, is to analyze a subsequent module of program code so that a maliciously modified version of the subsequent module of program code can be identified. The embedded non-volatile random access memory to also store the subsequent module of program code.

Abstract: A method is described. The method includes monitoring reliability, power consumption and performance of a processor and writing reliability, power consumption and performance data of the processor into an embedded non-volatile random access memory that is integrated into the processor's semiconductor chip.

Abstract: Examples include techniques for self-healing of a processor in a computing system. A processor semiconductor chip includes one or more processing cores and an embedded non-volatile random-access memory (NVRAM), the NVRAM storing instructions that when executed by the one or more processing cores detect an error causing a core failure, update processor configuration information that reflects the core failure, and cause reset and initialization of the processor using the updated processor configuration information.

Abstract: An embodiment of a semiconductor apparatus may include technology to convert an analog voltage level of a memory cell of a multi-level memory to a multi-bit digital value, and determine a single-bit value of the memory cell based on the multi-bit digital value. Some embodiments may also include technology to track a temporal history of accesses to the memory cell for a duration in excess of ten seconds, and determine the single-bit value of the memory cell based on the multi-bit digital value and the temporal history. Other embodiments are disclosed and claimed.

Abstract: A call is setup between an originating device (A) and a terminating device (B), which both have access to a public land mobile network (131, 132) and a mobile data network (121, 122). The originating and terminating devices device (A; B) include a respective software-implemented call handling tool (SWA; SWB) configured to assist a user in placing and receiving calls. Bridge nodes (140) are connected to the mobile data network (121, 122), the public land mobile network (131, 132) and a server node (110), which also is connected to the mobile data network (121, 122). In response to a call-setup command from a user of the originating device (A), the software-implemented call handling tool (SWA), on one hand, sends a call-setup request (1) to the server node (110); and on the other hand, makes a first call (2) to a first bridge node (140) over the public land mobile network (131) using a first telephone number (#1).

Abstract: Examples include techniques for booting a computing system. A processor semiconductor chip includes one or more processing cores and an embedded non-volatile random-access memory (NVRAM), the NVRAM storing instructions that when executed by the one or more processing cores manages a boot process for a computing system.

Abstract: A group call is setup between one originating device (A) and at least two terminating devices (B, C), which each has access to a public land mobile network (131, 132, 133) and a mobile data net-work (121, 122, 123). The originating and terminating devices (A, B, C) include a respective software-implemented call handling tool (SWA, SWB, SWC) configured to assist a user in placing and receiving group calls. Bridge nodes (141, 142, 143) are connected to the mobile data network (121, 122, 123), the public land mobile network (131, 132, 133) and a server node (110), which, in turn, also is connected to the mobile data network (121, 122, 123).

Abstract: A system and user interface capable of effectively manipulating high volumes of data is provided. The system and/or user interface is specially-configured to aggregate large data volumes and translate the large data volumes into summary information associated with navigable categorizations (e.g., categorizations linked to selectable visualizations in the user interface) that enable dynamic selection and visualization of portions of the large data volumes. In one particular example, the system and/or user interface is adapted to generate selectable panels having a plurality of build or editing tools displayed coextensive with portions of the large volumes of data. Such panels may be particularly useful for generating a placement (e.g., an advertisement) while reviewing or managing large amounts of information, such as ad placement and performance information for hundreds or thousands or advertisements.