Abstract: At least one example embodiment provides a controller to sample a first signal. The first signal indicates an initial amplitude of an output signal of an oscillator circuit. The controller selects a step amount based on the first signal and a target amplitude of the output signal. The controller generates a control signal for the oscillator circuit based on the selected step amount. The control signal indicates a change in gain for the oscillator circuit according to the selected step amount.

Abstract: At least one example embodiment provides a controller to sample a first signal. The first signal indicates an initial amplitude of an output signal of an oscillator circuit. The controller selects a step amount based on the first signal and a target amplitude of the output signal. The controller generates a control signal for the oscillator circuit based on the selected step amount. The control signal indicates a change in gain for the oscillator circuit according to the selected step amount.

Abstract: A method and a means for determining an IDDQ test limit of an integrated circuit are provided. In particular, a method is provided which includes measuring the IDDQ value of a test structure formed upon a die derived from the same lot of wafers as an integrated circuit. The method may further include setting the IDDQ test limit based upon the measured IDDQ value. In some embodiments, setting the IDDQ test limit may include correlating the IDDQ value of the test structure to calibration data. Accordingly, a means for conducting such a method may include one or more test structures formed upon a die and calibration data adapted to correlate a test structure IDDQ value to an IDDQ test limit of an integrated circuit. In some cases, the means for determining the IDDQ test limit may further include a means for increasing a substrate leakage current of the test structure.