Abstract: A digital radio frequency receiver capable of receiving RF signals at a plurality of signal strengths thereby extending the dynamic range of the receiver without introducing a control loop while allowing a stable gain control algorithm to be implemented in software is described. Various embodiments of a digital radio receiver process a range of signals outside normal analog to digital converter capabilities and bypass the delays resulting from gain control loops.

Abstract: A system and method for providing a configurable signal processing circuit for a field configurable radio frequency communication system that is adaptable to be configured to function with a variety of signaling schemes or waveforms, and including an intermediate frequency (IF) digital signal processing circuit. A “tool box” of configurable signal processing circuits is available for processing multi-bit digital signals into and out of the IF circuit. Control registers receive digital instructions to select, interconnect and configure various circuits from the tool box to provide added signal processing for the selected the transmitter or receiver mode of operation as a function of the selected signaling scheme.

Abstract: A system and method for controlling the output of multi bit digital signals from a field configurable radio frequency communications system having a first register adapted to receive multi bit digital signals from a variety of sources, wherein the register includes a tag section for providing tag bits to the signal bit to identify the source of the signal. A second register is provided for using the tag bits for storing the multi bit signals according to the source of the signal. The multi bit signals and tag bits can be outputted directly from the first register, or from the second register, depending on the mode of operation selected by the output signal receiving circuit.

Abstract: A system and method for providing a field configurable radio frequency communication system including an intermediate frequency digital signal processing circuit therefor. The intermediate frequency digital signal processing circuits includes digital transmitter and receiver circuit paths, a digital baseband circuit, control registers and an interface circuit. The transmitter and receiver circuit paths and the baseband circuits include digital processing circuits that are configurable by commands provided to the control register via the interface circuit to select the transmitter or receiver mode of operation, to select the signaling scheme of waveform employed, to configure the signal processing functions of the transmitter or receiver circuit paths, and to select the use of any of a plurality a baseband signal processing functions.

Abstract: A digital noise reduction for a radio frequency receiver communication systems that is field programmable to function with a large variety of signaling schemes or waveforms. The noise reduction arrangement includes circuits to convert the mulit bit digital signal (including noise impulses therein) into logarithmic form and uses exponential averaging to determine the presence of noise and the magnitude thereof. Various threshold circuits, the exponential averaging circuits and an exponential decay circuit are responsive to digital commands to set the thresholds for noise detection and control when the noise should be blanked and the duration of blanking.

Abstract: A system and method for providing a digital field configurable radio frequency communication system that can be configured into a transmitter, or a receiver, to function with a plurality of signaling schemes, such as, AM, AME, A3E, H3E, J3E, CW, SSB, M-PSK, QAM, ASK, angular modulation, including FM, PM, FSK, CMP, MSK, CPFSK etc. The system includes a non volatile memory that is adapted to receive and store instructions for configuring the system. A user selects the mode of operation and the signaling scheme, and instructions and software are downloaded from the memory into the system and configure the system as selected by the user.