Abstract: A decision feedback equalizer (DFE) architecture uses feedback samples that are over-sampled with respect to the symbol rate. On-baud feedback samples are quantized with a slicer, while off-baud samples are linear, IIR samples. Both forward and feedback filters are fractionally-spaced, but adapted only at the baud instances.

Abstract: A decision feedback equalizer (DFE) architecture uses feedback samples that are over-sampled with respect to the symbol rate. On-baud feedback samples are quantized with a slicer, while off-baud samples are linear, IIR samples. Both forward and feedback filters are fractionally-spaced, but adapted only at the baud instances.

Abstract: A decision feedback equalizer (DFE) architecture uses feedback samples that are over-sampled with respect to the symbol rate. On-baud feedback samples are quantized with a slicer, while off-baud samples are linear, IIR samples. Both forward and feedback filters are fractionally-spaced, but adapted only at the baud instances.

Abstract: According to some aspects of this invention, a compact, broadband active receiving antenna uses one or more high transconductance transistors such as Field Effect Transistor(s) paired with another Transistor and arranged in a Cascode amplifier configuration. Some embodiments involve a single high transconductance transistor arranged with a high efficiency transformer in a nondissipative feedback loop to improve linearity and dynamic range. The devices have a high input resistance, low input capacitance, low noise and a very high second and third order Intercept Point. Since the gain is primarily a function of the amplifying electronics, it is not necessary to increase the directivity of the antenna to achieve higher gain.

Abstract: Devices and methods are disclosed for enabling receiving antennas to accommodate a wide operational bandwidth and excellent gain and sensitivity requirements despite a compact form-factor. According to some aspects of the invention, a compact, broadband active receiving antenna uses one or more high transconductance transistors such as Field Effect Transistor(s) each paired with another Transistor, each pair arranged in a Cascode amplifier configuration. Some aspects of the invention involve a single high transconductance transistor arranged with a high efficiency transformer in a nondissipative feedback loop. This couples the signal energy from the drain or collector of the transistor to the transistor's source or emitter to improve linearity and dynamic range. This novel architecture has the characteristics of having a high input resistance, low input capacitance, low noise and a very high second and third order Intercept Point.