Patents by Inventor Christopher Delaney

Christopher Delaney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11773362
    Abstract: Bioreactors and components of bioreactors are described as may be beneficially utilized in development and conditioning of cellular materials for study or implant. The bioreactors are modular, and components of the bioreactors can be easily assembled with alternatives provided to develop specific, predetermined conditioning environments for cellular materials (e.g., implantable tissue). By selection of one of multiple alternative compliance chambers, a bioreactor can be utilized to condition tissue in a low-pressure circuit (e.g., a pulmonary heart circuit), and by utilization of an alternative compliance chamber, the bioreactor can instead condition tissue in a high-pressure circuit (e.g., an aortic heart circuit).
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: October 3, 2023
    Assignee: Clemson University Research Foundation
    Inventors: Leslie Sierad, Christopher Delaney, Richard Pascal, III, Dan Simionescu, Agneta Simionescu
  • Patent number: 11693806
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: July 4, 2023
    Assignee: Kioxia Corporation
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 11638646
    Abstract: The production of bioceramic powders and bioceramic implants are described and an additive manufactured implant used for tissue reconstruction and a method for manufacturing the implant are disclosed. The implant may be fabricated at least in part from suitable bioceramic powders produced using tailored mineral compositions tailored to the unique material properties of the tissue being replaced. The implants may be tailored to a three-dimensional shape and mechanical properties of the tissue defect designed to be replaced by surgical implantation of the device. Native tissue repair and regeneration at the site of implantation are also provided.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: May 2, 2023
    Assignee: 3D Biomaterials, Inc.
    Inventors: David Christopher Delaney, Duran N Yetkinler
  • Publication number: 20220222192
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 14, 2022
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 11308015
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: April 19, 2022
    Assignee: Kioxia Corporation
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Publication number: 20210246411
    Abstract: Bioreactors and components of bioreactors are described as may be beneficially utilized in development and conditioning of cellular materials for study or implant. The bioreactors are modular, and components of the bioreactors can be easily assembled with alternatives provided to develop specific, predetermined conditioning environments for cellular materials (e.g., implantable tissue). By selection of one of multiple alternative compliance chambers, a bioreactor can be utilized to condition tissue in a low-pressure circuit (e.g., a pulmonary heart circuit), and by utilization of an alternative compliance chamber, the bioreactor can instead condition tissue in a high-pressure circuit (e.g., an aortic heart circuit).
    Type: Application
    Filed: April 29, 2021
    Publication date: August 12, 2021
    Inventors: LESLIE SIERAD, CHRISTOPHER DELANEY, RICHARD PASCAL, III, DAN SIMIONESCU, AGNETA SIMIONESCU
  • Patent number: 11034928
    Abstract: Bioreactors and components of bioreactors are described as may be beneficially utilized in development and conditioning of cellular materials for study or implant. The bioreactors are modular and components of the bioreactors can be easily assembled with alternatives provided to develop specific, predetermined conditioning environments for cellular materials (e.g., implantable tissue). By selection of one of multiple alternative compliance chambers, a bioreactor can be utilized to condition tissue in a low pressure circuit (e.g., a pulmonary heart circuit), and by utilization of an alternative compliance chamber, the bioreactor can instead condition tissue in a high pressure circuit (e.g., an aortic heart circuit).
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: June 15, 2021
    Assignee: Clemson University Research Foundation
    Inventors: Leslie Sierad, Christopher Delaney, Richard Pascal, III, Dan Simionescu, Agneta Simionescu
  • Patent number: 10521305
    Abstract: In one embodiment, a solid state drive (SSD) with power loss protection (PLP) includes a SSD controller, a secondary controller and a power circuit configured to supply power to the SSD from a power source during normal operation and backup power from a backup power source in response to a loss of power supplied by the power source. In the event of a loss of power, the secondary controller is configured to track the holdup time, or duration of time for which the primary controller can operate on backup power. In one embodiment, the holdup time tracked by the secondary controller is stored in a non-volatile memory in communication with the secondary controller.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 31, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Christopher Delaney, Leland Thompson, John Hamilton, Gordon Waidhofer, Ali Aiouaz
  • Publication number: 20190026244
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Application
    Filed: September 27, 2018
    Publication date: January 24, 2019
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 10120823
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 9910619
    Abstract: A solid state drive includes a dual buffer for buffering incoming write data prior to committal to a non-volatile memory. The buffer is operated to provide a temporary backup of dirty data pending successful completion of a host transfer. The dual buffer may be operated as a primary buffer and a secondary buffer. The primary buffer may be used as the default buffer during normal operation. The secondary buffer is written to during a host transfer that is a cache write to dirty data. A copying process may be used to copy data between the primary and the secondary buffer to preserve the backup data pending successful completion of the host transfer.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: March 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Christopher Delaney, Gordon Waidhofer, Leland Thompson, Ali Aiouaz
  • Patent number: 9910767
    Abstract: On-chip instruction RAM is leveraged as an extension of on-chip data RAM during normal use of a modified Harvard Architecture processor. Unused space in an instruction RAM is detected in a modified Harvard Architecture processor. During operation of the processor this unused space is used to load and store data normally loaded and stored in an on-chip data RAM. A performance penalty associated with swapping out to external memory is reduced. The type of data stored in the unused portion of the instruction RAM may be selected to optimize performance. In one implementation, the unused space in the instruction RAM is used to load and store only a single type of data, such as heap, stack, initialized or uninitialized data.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: March 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Gordon Waidhofer, Christopher Delaney, Leland Thompson
  • Publication number: 20170315889
    Abstract: In one embodiment, a solid state drive (SSD) with power loss protection (PLP) includes a SSD controller, a secondary controller and a power circuit configured to supply power to the SSD from a power source during normal operation and backup power from a backup power source in response to a loss of power supplied by the power source. In the event of a loss of power, the secondary controller is configured to track the holdup time, or duration of time for which the primary controller can operate on backup power. In one embodiment, the holdup time tracked by the secondary controller is stored in a non-volatile memory in communication with the secondary controller.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 2, 2017
    Inventors: Christopher Delaney, Leland Thompson, John Hamilton, Gordon Waidhofer, Ali Aiouaz
  • Publication number: 20170177276
    Abstract: A solid state drive includes a dual buffer for buffering incoming write data prior to committal to a non-volatile memory. The buffer is operated to provide a temporary backup of dirty data pending successful completion of a host transfer. The dual buffer may be operated as a primary buffer and a secondary buffer. The primary buffer may be used as the default buffer during normal operation. The secondary buffer is written to during a host transfer that is a cache write to dirty data. A copying process may be used to copy data between the primary and the secondary buffer to preserve the backup data pending successful completion of the host transfer.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Inventors: Christopher Delaney, Gordon Waidhofer, Leland Thompson, Ali Aiouaz
  • Publication number: 20170177233
    Abstract: A solid state drive includes a dual buffer for buffering incoming write data prior to committal to a non-volatile memory. The buffer is operated to provide a temporary backup of dirty data pending successful completion of a host transfer. The dual buffer may be operated as a primary buffer and a secondary buffer. The primary buffer may be used as the default buffer during normal operation. The secondary buffer is written to during a host transfer that is a cache write to dirty data. A copying process may be used to copy data between the primary and the secondary buffer to preserve the backup data pending successful completion of the host transfer.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Inventors: Christopher Delaney, Gordon Waidhofer, Leland Thompson, Ali Aiouaz
  • Publication number: 20160172014
    Abstract: On-chip instruction RAM is leveraged as an extension of on-chip data RAM during normal use of a modified Harvard Architecture processor. Unused space in an instruction RAM is detected in a modified Harvard Architecture processor. During operation of the processor this unused space is used to load and store data normally loaded and stored in an on-chip data RAM. A performance penalty associated with swapping out to external memory is reduced. The type of data stored in the unused portion of the instruction RAM may be selected to optimize performance. In one implementation, the unused space in the instruction RAM is used to load and store only a single type of data, such as heap, stack, initialized or uninitialized data.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 16, 2016
    Inventors: Gordon WAIDHOFER, Christopher DELANEY, Leland THOMPSON
  • Publication number: 20160162649
    Abstract: In a regression modeling system, activation scale values over a plurality of survey participants is used to generate a regression to identify a predictive model that can have a direct explanatory relationship to healthcare utilization and cost. The survey can comprise a number of declarative statements and the responses can be an indication of a participant's level of agreement. The activation scale value for a given individual is thus a predictive dependent variable that can be changed with a known effect on outcomes (independent variables). For example, healthcare utilization and costs will decline as an activation scale value goes up.
    Type: Application
    Filed: February 12, 2016
    Publication date: June 9, 2016
    Inventors: Eldon R. Mahoney, Christopher Delaney
  • Publication number: 20160024452
    Abstract: Bioreactors and components of bioreactors are described as may be beneficially utilized in development and conditioning of cellular materials for study or implant. The bioreactors are modular and components of the bioreactors can be easily assembled with alternatives provided to develop specific, predetermined conditioning environments for cellular materials (e.g., implantable tissue). By selection of one of multiple alternative compliance chambers, a bioreactor can be utilized to condition tissue in a low pressure circuit (e.g., a pulmonary heart circuit), and by utilization of an alternative compliance chamber, the bioreactor can instead condition tissue in a high pressure circuit (e.g., an aortic heart circuit).
    Type: Application
    Filed: July 23, 2015
    Publication date: January 28, 2016
    Inventors: Leslie Sierad, Christopher Delaney, Richard Pascal, III, Dan Simionescu, Agneta Simionescu
  • Publication number: 20090074932
    Abstract: A protein-fortified frozen dessert formulation and the process for making it are described. In particular, a sweet mix of 10-20% w/w sugar, 0-10% w/w flavouring, 0-20% w/w fat, 10-15% w/w milk solids, 0-11% w/w protein and 50-65% w/w water is prepared, preheated, pasteurized, homogenized and aged. The aged sweet-mix is then blended with yogurt and optionally more protein prior to freezing. Alternatively, a mix of 10-20% w/w sugar, 0-10% w/w flavouring, 0-20% w/w fat, 10-15% w/w milk solids, 5-15% w/w protein, 5-20% yogurt and 50-65% w/w water is prepared, preheated, pasteurized, homogenize and aged and frozen to a low target overrun.
    Type: Application
    Filed: December 20, 2006
    Publication date: March 19, 2009
    Inventors: Robert Swan, Christopher Delaney, Amanda House
  • Patent number: D490620
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: June 1, 2004
    Assignee: Huntco Supply, LLC
    Inventor: Michael Christopher Delaney