Abstract: A system and method, including software implemented techniques, can be used to adjust for sag in stored data values. Charge is applied to multiple memory cells, and each memory cell is charged to a target voltage corresponding to a data value. The memory cells include a reference cell that is charged to a predetermined voltage. A voltage level in the reference cell is detected, and voltage levels from a group of memory cells are also detected. An adjustment is performed based upon the difference between the detected voltage level in the reference cell and the predetermined voltage.

Abstract: Techniques for reducing mount time for a peripheral device connected to an external host device are presented. In some implementations, when a connection is detected, file system data is pre-fetched before a request for such data is sent by the external host device. This allows faster access to the file system data used for initiating read/write communications. In other implementations, in response to a data access command from the external host device, a reply message is delayed from the peripheral device to prevent data access command failures. This delayed response prevents the external host device from pausing before attempting subsequent communication requests.

Abstract: Techniques for reducing dismount time for a peripheral device connected to an external host device are presented. Instead of waiting for a dismount procedure to complete, a reply message indicating that dismount operations have been completed is sent to the external host device. This triggers a message from the external host device that the peripheral device is ready to be safely removed. The peripheral device completes the dismount operations including cache and memory cleanup after the reply message indicating that dismount operations have been completed is sent to the external host device. The dismount operations may be completed under battery power if necessary. This enables quicker unplugging of the peripheral device from the external host device and can allow the peripheral device to transition from a first mode into a second mode faster.

Abstract: A host processor is coupled to a memory controller and configurable to retrieve from the memory controller information indicative of the health of a non-volatile memory device operatively coupled to the memory controller. A host system uses the information to monitor the health of the non-volatile memory device.

Abstract: A host processor is coupled to a memory controller and configured to retrieve from the memory controller at least one attribute of at least one non-volatile memory device operatively coupled to the memory controller. A memory management policy is modified based on the attribute.

Abstract: A method for managing data storage is described. The method includes receiving data from an external host at a peripheral storage device, detecting a file system type of the external host, and adapting a caching policy for transmitting the data to a memory accessible by the storage device, wherein the caching policy is based on the detected file system type. The detection of the file system type can be based on the received data. The detection bases can include a size of the received data. In some implementations, the detection of the file system type can be based on accessing the memory for file system type indicators that are associated with a unique file system type. Adapting the caching policy can reduce a number of data transmissions to the memory. The detected file system type can be a file allocation table (FAT) system type.

Abstract: Articles of manufacture and associated methods and systems can be implemented for identifying a condition in which a voltage level being supplied to a data storage device (DSD) may be increased as needed to operate the data storage device. Upon identifying such a condition, the voltage level supplied to the DSD may be increased incrementally. In some implementations, a controller signals a voltage regulator to increment a DSD supply voltage in response to a determination that the present voltage level is insufficient to operate at a desired performance level. The voltage level supplied to a DSD may be adjusted when power is applied to the DSD from an unpowered state, and/or during operation of the DSD. Automatically increasing the voltage supplied to a DSD as needed to support operation may promote high efficiency at low voltages and extended service life at higher voltages.

Abstract: Apparatus and associated systems, methods and computer program products relate to using information stored in a flash memory to adjust the operating voltage supplied to the flash memory. The voltage information indicates a minimum operating voltage at which to operate the flash memory device. In general, operating a flash memory device near a minimal operating voltage may substantially minimize power consumption. The minimum operating voltage for individual flash memory devices may vary from IC to IC, by manufacturing lot, and by manufacturer. In a product, the minimum operating voltage for a particular flash memory may be determined, for example, by a controller built-in to a flash memory reporting (automatically or in response to a query) the minimum operating voltage (e.g., 2.5 V, 3.15 V) to a memory controller or microprocessor. The stored voltage information may further include information to adjust the operating voltage based on temperature.

Abstract: Articles and associated methods and systems relate to selecting read interleaving policies independently of selecting write interleaving policies. In various implementations, the selection may be static or dynamic during operation. In implementations that dynamically select read interleaving policies and write interleaving policies, the selection may be based on various operating conditions, such as temperature, power source, battery voltage, and operating mode. Examples of operating modes may include (1) reading or writing to flash memory when connected to an external power source, (2) reading from flash memory when powered by portable power source (e.g., battery), and (3) writing to flash memory when powered by a portable power source.

Abstract: Articles and associated methods and systems relate to disabling defective flash memory dies in a device containing multiple flash memory dies. Packages containing multiple flash memory dies may be labeled to indicate a flash memory data storage capacity based on the flash memory dies that are not disabled. Various disabling methods may be applied at the die level, package level, and/or board level.