Abstract: A method of preparing an additive suspension circuit for a hard disk drive suspension includes electrodepositing an alloy of copper using an electrolytic bath containing copper sulfate, tin, iron, sulfuric acid, and hydrochloric acid, using pulsed current of about 10-45 amperes per square foot.

Abstract: A computer implemented method includes identifying a universal resource locator and characterizing a traffic pattern associated with the universal resource locator. The traffic pattern can include referrer information, referring information, advertising network relationship information, and any combination thereof. The method can further include classifying the universal resource locator into a risk category based on the traffic pattern.

Abstract: Some embodiments provide a system for managing violations during physical verification. The system may identify a design-rule-check (DRC) violation by applying a set of DRC rules to a layout. The system can then receive an error classification from the user which specifies how the DRC violation is to be handled. Next, the system can store the DRC violation, the user-selected error classification, and a user identifier associated with the user in a database. If the user is not authorized to approve the error classification, the database can indicate that the error classification has not been approved. Later, a user who is authorized to approve the error classification can approve the error classification. The system can determine if a cell is known, and if so, the system can use the violations and error classifications stored in the database to speed up the verification process.

Abstract: An additive process disk drive suspension interconnect, and method therefor is provided. The interconnect has a metal grounding layer of typically stainless steel or copper metallized stainless steel, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

Abstract: An additive process disk drive suspension interconnect, and method therefor is provided. The interconnect has a metal grounding layer of typically stainless steel or copper metallized stainless steel, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

Abstract: A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

Abstract: A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

Abstract: Some embodiments provide a system for managing violations during physical verification. The system may identify a design-rule-check (DRC) violation by applying a set of DRC rules to a layout. The system can then receive an error classification from the user which specifies how the DRC violation is to be handled. Next, the system can store the DRC violation, the user-selected error classification, and a user identifier associated with the user in a database. If the user is not authorized to approve the error classification, the database can indicate that the error classification has not been approved. Later, a user who is authorized to approve the error classification can approve the error classification. The system can determine if a cell is known, and if so, the system can use the violations and error classifications stored in the database to speed up the verification process.

Abstract: The invention provides high surface area talc compositions by a novel hybrid milling method or soaking method. The hybrid milling method comprises dry milling talc powder followed by mixing with water and wet milling to provide a nano-talc slurry with high surface area, also of the invention. The soaking method comprises dry milling talc powder followed by mixing with water and soaking the powder for a period of time to provide high surface area nano-talc slurry, also of the invention. The slurry may be dewatered and dried to provide dry nano-talc powder. The nano-talc powder provided by the invention is a novel hydrophilic talc composition also of the invention.

Abstract: Shaping of a gimbal suspension element for a disk drive suspension using fewer process steps includes disposing an element, precursor assembly of a plastic film layer and a copper layer with an interlayer of a copper seed layer and a Monel alloy for etching, and etching the assembly with an etchant such as cupric chloride for both the alloy and the copper seed layer of the interlayer.

Abstract: A method of detecting an event in a structure using a device having sensors and at least one actuator includes sending a signal from the at least one actuator encapsulated in the device, returning a reflected wave signal from the event to each of the sensors in the device, determining a respective duration of time for which the signal travels from the event to each of the sensors, and calculating a location of the event by using differences in the respective durations of time for which the signal travels from the event to each of the sensors to determine an angle and a distance at which the event is positioned.

Abstract: The invention relates to chiral photoisomerizable compounds of formula (I) wherein X1, X2, X3, X4, X5 and X6 have the meanings given in claim 1, to liquid crystalline mixtures and polymers containing them, and to the use of chiral photoisomerizable compounds, liquid crystalline mixtures and polymers containing them in optical and electrooptical devices like liquid crystal displays or projection systems, in optical elements like polarizers, retardation films, compensators, color filters or holographic elements, in liquid crystal pigments and colored films or coatings for decorative or security applications, cosmetic and pharmaceutical compositions, in nonlinear optics and optical information storage.

Abstract: A device for use in detecting structural damage comprises at least one piezoelectric wafer including a sensor, and an actuator in-plane with the sensor. At least one of the sensor and the actuator at least partially surrounds the other of the sensor and the actuator such that the piezoelectric wafer provides radial detection of structural occurrences in a material.

Abstract: The invention provides high surface area talc compositions by a novel hybrid milling method or soaking method. The hybrid milling method comprises dry milling talc powder followed by mixing with water and wet milling to provide a nano-talc slurry with high surface area, also of the invention. The soaking method comprises dry milling talc powder followed by mixing with water and soaking the powder for a period of time to provide high surface area nano-talc slurry, also of the invention. The slurry may be dewatered and dried to provide dry nano-talc powder. The nano-talc powder provided by the invention is a novel hydrophilic talc composition also of the invention.

Abstract: Progressively optimized clock tree/mesh construction is performed concurrently with placement of all remaining objects. Clock tree/mesh is specified loosely for initial placement, then followed by progressive detailed placement. In particular, preferred approach provides automated and reliable solution to clock tree/mesh construction, occuring concurrently with placement process so that clock tree wiring and buffering considers and influences placement and wiring of all other objects, such as logic gates, memory elements, macrocells, etc. Hence, in this concurrent manner, clock tree/mesh pre-wiring and pre-buffering may be based on construction of approximate clock tree using partitioning information only, i.e., prior to object placement. Further, present approach provides modified DME-based clock tree topology construction without meandering, and recursive algorithm for buffered clock tree construction.

Abstract: A method for detecting Helicobacter pylori in a subject's gastroenteral tract involves measuring a change in resistance of an electronic or electrochemical sensor, notably a polypyrrole film, on exposure to gas from the subject's lungs and/or stomach. Depending on the magnitude of the change (if any) a positive or negative result is indicated visually by electronics means. Two sensors are used, one of which receives a sample of gas which has passed through an amonia-absorbing means to provide a corrected baseline value for the ammonia. The invention also provides apparatus suitable for carrying out the method.

Abstract: A method for detecting Helicobacter pylori in a subject's gastroenteral tract involves measuring a change in resistance of an electronic or electrochemical sensor, notably a polypyrrole film, on exposure to gas from the subject's lungs and/or stomach. Depending on the magnitude of the change (if any) a positive or negative result is indicated visually by electronics means. Two sensors are used, one of which receives a sample of gas which has passed through an ammonia-absorbing means to provide a corrected baseline value for the ammonia. The invention also provides apparatus suitable for carrying out the method.

Abstract: A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.