Patents by Inventor Christopher Elisha Neilson

Christopher Elisha Neilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968091
    Abstract: Methods and apparatus for enabling detection of configuration changes in a network device. One method uses a configuration counter in a system database of the network device. In response to an atomic submission of CLI commands to a configuration agent and the storing of the corresponding configuration in a system database, the configuration counter is incremented. An OpenConfig module maintains an expected value of the configuration counter and, upon completion of its own command submissions, compares the expected value to the value in the configuration counter. If the two values do not match, it indicates that the configuration counter in the system database has been incremented as a result of a configuration change from a source other than the OpenConfig module. A configuration client can then be notified of the configuration change so that it can revert the configuration to a desired configuration.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: April 23, 2024
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Roman Olegovich Chertov, Sebastian Sapa, Christopher Elisha Neilson, Francois Guy Maurice Ripault, Ronan Mac Fhlannchadha
  • Patent number: 11436135
    Abstract: Systems and methods for implementing polymorphic allocators in an operating system are disclosed. An illustrative method includes a method of allocating memory space in a memory by creating a first allocator. In response to receiving a first request to allocate memory space in the memory for a data buffer instance using the first allocator, the method allocates one or more pages of a first region in the memory by populating one or more entries of an allocator table. The one or more entries of the allocator table correspond to the one or more pages of the first region. The entries of the allocator table are indexed by page indexes corresponding to page addresses identifying the pages of the first region in the memory. Each of the populated entries of the allocator table includes a specific allocator identifier identifying a corresponding allocator to that entry.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: September 6, 2022
    Assignee: Arista Networks, Inc.
    Inventors: Duncan Stuart Ritchie, Christopher Elisha Neilson, Sebastian Sapa
  • Patent number: 11422872
    Abstract: Systems and methods for creating a new entry in a hierarchical state data structure with object entries is disclosed. The method includes allocating a shared memory buffer for a new entry in a shared memory. A request to create the new entry for a child object in a hierarchical state data structure in the shared memory is received. The new entry is to span at least one shared memory buffer uniquely identifiable in a location of the shared memory. The child object is a logical representation of a state of a system. In response to a request for an allocation of a shared memory buffer within a region of the shared memory for the new entry, a location identifier corresponding to a location of a parent entry holding a parent object to the child object in the hierarchical state data structure of an allocated region is received. The child object is created in the shared memory buffer for the new entry, and the new entry is available for concurrent access by one or more readers of the shared memory.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: August 23, 2022
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Christopher Elisha Neilson, Duncan Stuart Ritchie, Sebastian Sapa
  • Patent number: 11314656
    Abstract: Systems and methods for processing memory address spaces corresponding to a shared memory are disclosed. After a writer restart process, pre-restart writer pointers of a pre-restart writer addressable space in the shared memory are replaced with corresponding location independent pointers. A writer pointer translation table is rebuilt in the shared memory to replace an association of modified pre-restart writer pointers and pre-restart translation base pointers based on the pre-restart writer pointers, respectively, with an association of modified post-restart writer pointers and post-restart translation base pointers based on post-restart writer pointers, respectively. After the writer pointer translation table is rebuilt, the location independent pointers are replaced with post-restart writer pointers in the shared memory, respectively, and the post-restart writer pointers are stored in the shared memory for access by one or more readers of the shared memory.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: April 26, 2022
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Duncan Stuart Ritchie, Christopher Elisha Neilson, Sebastian Sapa
  • Publication number: 20220114084
    Abstract: Systems and methods for implementing polymorphic allocators in an operating system are disclosed. An illustrative method includes a method of allocating memory space in a memory by creating a first allocator. In response to receiving a first request to allocate memory space in the memory for a data buffer instance using the first allocator, the method allocates one or more pages of a first region in the memory by populating one or more entries of an allocator table. The one or more entries of the allocator table correspond to the one or more pages of the first region. The entries of the allocator table are indexed by page indexes corresponding to page addresses identifying the pages of the first region in the memory. Each of the populated entries of the allocator table includes a specific allocator identifier identifying a corresponding allocator to that entry.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Inventors: Duncan Stuart Ritchie, Christopher Elisha Neilson, Sebastian Sapa
  • Publication number: 20220050789
    Abstract: Systems and methods for processing memory address spaces corresponding to a shared memory are disclosed. After a writer restart process, pre-restart writer pointers of a pre-restart writer addressable space in the shared memory are replaced with corresponding location independent pointers. A writer pointer translation table is rebuilt in the shared memory to replace an association of modified pre-restart writer pointers and pre-restart translation base pointers based on the pre-restart writer pointers, respectively, with an association of modified post-restart writer pointers and post-restart translation base pointers based on post-restart writer pointers, respectively. After the writer pointer translation table is rebuilt, the location independent pointers are replaced with post-restart writer pointers in the shared memory, respectively, and the post-restart writer pointers are stored in the shared memory for access by one or more readers of the shared memory.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 17, 2022
    Inventors: Duncan Stuart Ritchie, Christopher Elisha Neilson, Sebastian Sapa
  • Patent number: 11222002
    Abstract: Techniques are described herein for managing data structure groups. Such techniques may include providing to a data structure group, by a reader, a plurality of data structure identifiers including a first data structure identifier and a second data structure identifier; mounting, by the data structure group, a first data structure identified by the first data structure identifier and including a first instance identifier; mounting, by the data structure group, a second data structure identified by the second data structure identifier and including a second instance identifier; making a first determination that the first data structure and the second data structure are mounted; making a second determination that the first instance identifier and the second instance identifier match; and marking, based on the first determination and the second determination, the data structure group as ready-to-read.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: January 11, 2022
    Assignee: Arista Networks, Inc.
    Inventors: Jonathan Antusiak, Christopher Elisha Neilson, Sebastian Sapa, Duncan Stuart Ritchie
  • Publication number: 20210373982
    Abstract: Systems and methods for creating a new entry in a hierarchical state data structure with object entries is disclosed. The method includes allocating a shared memory buffer for a new entry in a shared memory. A request to create the new entry for a child object in a hierarchical state data structure in the shared memory is received. The new entry is to span at least one shared memory buffer uniquely identifiable in a location of the shared memory. The child object is a logical representation of a state of a system. In response to a request for an allocation of a shared memory buffer within a region of the shared memory for the new entry, a location identifier corresponding to a location of a parent entry holding a parent object to the child object in the hierarchical state data structure of an allocated region is received. The child object is created in the shared memory buffer for the new entry, and the new entry is available for concurrent access by one or more readers of the shared memory.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Inventors: Christopher Elisha Neilson, Duncan Stuart Ritchie, Sebastian Sapa
  • Publication number: 20200242099
    Abstract: Techniques are described herein for managing data structure groups. Such techniques may include providing to a data structure group, by a reader, a plurality of data structure identifiers including a first data structure identifier and a second data structure identifier; mounting, by the data structure group, a first data structure identified by the first data structure identifier and including a first instance identifier; mounting, by the data structure group, a second data structure identified by the second data structure identifier and including a second instance identifier; making a first determination that the first data structure and the second data structure are mounted; making a second determination that the first instance identifier and the second instance identifier match; and marking, based on the first determination and the second determination, the data structure group as ready-to-read.
    Type: Application
    Filed: December 10, 2019
    Publication date: July 30, 2020
    Inventors: Jonathan Antusiak, Christopher Elisha Neilson, Sebastian Sapa, Duncan Stuart Ritchie
  • Patent number: 10031859
    Abstract: A method and apparatus of a device that reads and writes a plurality of counters is described. In an exemplary embodiment, a device receives plurality labels that correspond to the plurality of counters. The plurality of counters is stored in a shared memory table in the shared memory of the device. In addition, a writer writes counter data for each of the plurality of counters to the shared memory table. For each of the plurality of labels, the device performs a lookup of that label for a memory reference to a corresponding counter that is one of the plurality of counters and retrieves the memory reference for the corresponding counter. The device further reads the counter data for plurality of counters using the plurality of memory references. The device additionally sends the counter data to the client.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: July 24, 2018
    Assignee: Arista Networks, Inc.
    Inventors: Duncan Stuart Ritchie, Sebastian Sapa, Christopher Elisha Neilson
  • Publication number: 20170371806
    Abstract: A method and apparatus of a device that reads and writes a plurality of counters is described. In an exemplary embodiment, a device receives plurality labels that correspond to the plurality of counters. The plurality of counters is stored in a shared memory table in the shared memory of the device. In addition, a writer writes counter data for each of the plurality of counters to the shared memory table. For each of the plurality of labels, the device performs a lookup of that label for a memory reference to a corresponding counter that is one of the plurality of counters and retrieves the memory reference for the corresponding counter. The device further reads the counter data for plurality of counters using the plurality of memory references. The device additionally sends the counter data to the client.
    Type: Application
    Filed: June 22, 2016
    Publication date: December 28, 2017
    Inventors: Duncan Stuart Ritchie, Sebastian Sapa, Christopher Elisha Neilson