Patents by Inventor Christopher Feuling FERGUSON

Christopher Feuling FERGUSON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Inductor apparatus and method of fabricating
    Patent number: 10867740
    Abstract: Some aspects pertain to an inductor apparatus that includes a first metal layer including a plurality of first interconnects, a second metal including a plurality of second interconnects, a first dielectric layer between the first metal layer and the second metal layer, and an inductor. The inductor includes a plurality of vias, where the plurality of vias are configured to couple the plurality of first interconnects to the plurality of second interconnects. The inductor includes a plurality of inductor loops formed by the plurality of vias, the plurality of first interconnects and the plurality of second interconnects. The inductor further includes a first magnetic layer and a second magnetic layer, located between the first interconnects and the second interconnects; and a third magnetic layer and an optional fourth magnetic layer outside of the plurality of inductor loops.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 15, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Donald William Kidwell, Jr., Ravindra Vaman Shenoy, Alan Lewis, Christopher Feuling Ferguson
  • INDUCTOR APPARATUS AND METHOD OF FABRICATING
    Publication number: 20190164681
    Abstract: Some aspects pertain to an inductor apparatus that includes a first metal layer including a plurality of first interconnects, a second metal including a plurality of second interconnects, a first dielectric layer between the first metal layer and the second metal layer, and an inductor. The inductor includes a plurality of vias, where the plurality of vias are configured to couple the plurality of first interconnects to the plurality of second interconnects. The inductor includes a plurality of inductor loops formed by the plurality of vias, the plurality of first interconnects and the plurality of second interconnects. The inductor further includes a first magnetic layer and a second magnetic layer, located between the first interconnects and the second interconnects; and a third magnetic layer and an optional fourth magnetic layer outside of the plurality of inductor loops.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventors: Donald William KIDWELL, JR., Ravindra Vaman SHENOY, Alan LEWIS, Christopher Feuling FERGUSON