Patents by Inventor Christopher G. Regier

Christopher G. Regier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10436874
    Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: October 8, 2019
    Assignee: National Instruments Corporation
    Inventors: Christopher G. Regier, Pablo Limon
  • Patent number: 10338110
    Abstract: A source-measure unit (SMU) may be implemented with digital control loops and circuitry to digitally compensate for the impact of input bias current on current measurements. One or more buffers having well-defined characteristics with respect to certain parameters which may affect the current measurements may be used in the output signal path of the SMU where a shunt voltage developed across a current sense element is measured. For example, the buffers may conduct/develop respective input bias currents that change perceptibly and predictably with temperature. By measuring the temperature and adjusting a control voltage—which is used to develop the shunt voltage—according to the temperature measurements, the impact of the input bias current[s] on the current measurement[s] may be reduced to negligible levels and/or may be eliminated.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: July 2, 2019
    Assignee: National Instruments Corporation
    Inventors: Pablo E. Limon-Garcia-Viesca, Christopher G. Regier
  • Publication number: 20190146050
    Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.
    Type: Application
    Filed: January 8, 2019
    Publication date: May 16, 2019
    Inventors: Christopher G. Regier, Pablo Limon
  • Patent number: 10175334
    Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: January 8, 2019
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Christopher G. Regier, Pablo Limon
  • Patent number: 10120405
    Abstract: A single semiconductor-based junction may be used to create a voltage reference, and temperature compensate the voltage reference, by time-multiplexing the voltage reference between different current drive levels. That is, the value of the current driven through the single junction may be repeatedly varied in a recurring manner. In case the junction is a zener diode, the current may be repeatedly switched between forward and reverse directions. As long as the temperature coefficients (in ppm/° C.) of the different voltages developed responsive to the different currents across the junction are different, a weighting of the different voltage values yield a zero temperature coefficient voltage reference value. To implement a bandgap reference, a single diode-connected bipolar junction transistor may alternately be forward-biased using a first current and at least a second current.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: November 6, 2018
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventor: Christopher G. Regier
  • Patent number: 9910074
    Abstract: An improved measurement system may include a source measure unit (SMU) capable of performing accurate low-level current measurements. Based on an SMU design that provides a controlled DC voltage source with precision current limiting and a controlled 0V (zero Volt) DC at the measurement terminal, an AC design may be implemented to establish the same (or very similar) conditions over a specified frequency range. Instead of controlling each digital-to-analog converter (DAC) at respective source terminals of the SMU as a respective DC output, each DAC may be controlled as a respective function generator with programmable frequency and continuously variable phase and amplitude. Off-the-shelf pipelined analog-to-digital converters (ADCs) may be used to monitor voltage, current and the voltage at the measurement terminal, and a Fourier transform may be used to obtain both the amplitude and relative phase measurements to be provided to respective control loops.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: March 6, 2018
    Assignee: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Blake A. Lindell, Christopher G. Regier, Pablo Limon
  • Publication number: 20170146575
    Abstract: A source-measure unit (SMU) may be implemented with digital control loops and circuitry to digitally compensate for the impact of input bias current on current measurements. One or more buffers having well-defined characteristics with respect to certain parameters which may affect the current measurements may be used in the output signal path of the SMU where a shunt voltage developed across a current sense element is measured. For example, the buffers may conduct/develop respective input bias currents that change perceptibly and predictably with temperature. By measuring the temperature and adjusting a control voltage—which is used to develop the shunt voltage—according to the temperature measurements, the impact of the input bias current[s] on the current measurement[s] may be reduced to negligible levels and/or may be eliminated.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 25, 2017
    Inventors: Pablo E. Limon-Garcia-Viesca, Christopher G. Regier
  • Publication number: 20170139001
    Abstract: An improved measurement system may include a source measure unit (SMU) capable of performing accurate low-level current measurements. Based on an SMU design that provides a controlled DC voltage source with precision current limiting and a controlled 0V (zero Volt) DC at the measurement terminal, an AC design may be implemented to establish the same (or very similar) conditions over a specified frequency range. Instead of controlling each digital-to-analog converter (DAC) at respective source terminals of the SMU as a respective DC output, each DAC may be controlled as a respective function generator with programmable frequency and continuously variable phase and amplitude. Off-the-shelf pipelined analog-to-digital converters (ADCs) may be used to monitor voltage, current and the voltage at the measurement terminal, and a Fourier transform may be used to obtain both the amplitude and relative phase measurements to be provided to respective control loops.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 18, 2017
    Inventors: Blake A. Lindell, Christopher G. Regier, Pablo Limon
  • Patent number: 9294057
    Abstract: A hybrid amplifier includes a linear amplifier coupled in series with a switching amplifier. The linear amplifier may generate an intermediate amplified signal according to an input signal. The switching amplifier may generate an output signal according to the intermediate amplified signal, the output signal having an amplitude with respect to a reference voltage provided at a reference node. The linear amplifier may drive the reference node to adjust the reference voltage responsive to transient changes in the output signal. A high-pass filter coupled to the linear amplifier and the switching amplifier may enable the switching amplifier to provide most of the steady-state current, which may drive a load, from actual ground. The linear amplifier and switching amplifier may be independently powered, for example from a power supply having a primary winding and two electrically isolated secondary windings that respectively provide power to the linear amplifier and the switching amplifier.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 22, 2016
    Assignee: National Instruments Corporation
    Inventor: Christopher G. Regier
  • Publication number: 20150286239
    Abstract: A single semiconductor-based junction may be used to create a voltage reference, and temperature compensate the voltage reference, by time-multiplexing the voltage reference between different current drive levels. That is, the value of the current driven through the single junction may be repeatedly varied in a recurring manner. In case the junction is a zener diode, the current may be repeatedly switched between forward and reverse directions. As long as the temperature coefficients (in ppm/° C.) of the different voltages developed responsive to the different currents across the junction are different, a weighting of the different voltage values yield a zero temperature coefficient voltage reference value. To implement a bandgap reference, a single diode-connected bipolar junction transistor may alternately be forward-biased using a first current and at least a second current.
    Type: Application
    Filed: April 4, 2014
    Publication date: October 8, 2015
    Applicant: NATIONAL INSTRUMENTS CORPORATION
    Inventor: Christopher G. Regier
  • Publication number: 20150168529
    Abstract: Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.
    Type: Application
    Filed: December 13, 2013
    Publication date: June 18, 2015
    Applicant: NATIONAL INSTRUMENTS CORPORATION
    Inventors: Christopher G. Regier, Pablo Limon
  • Publication number: 20150171793
    Abstract: A hybrid amplifier includes a linear amplifier coupled in series with a switching amplifier. The linear amplifier may generate an intermediate amplified signal according to an input signal. The switching amplifier may generate an output signal according to the intermediate amplified signal, the output signal having an amplitude with respect to a reference voltage provided at a reference node. The linear amplifier may drive the reference node to adjust the reference voltage responsive to transient changes in the output signal. A high-pass filter coupled to the linear amplifier and the switching amplifier may enable the switching amplifier to provide most of the steady-state current, which may drive a load, from actual ground. The linear amplifier and switching amplifier may be independently powered, for example from a power supply having a primary winding and two electrically isolated secondary windings that respectively provide power to the linear amplifier and the switching amplifier.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Applicant: NATIONAL INSTRUMENTS CORPORATION
    Inventor: Christopher G. Regier
  • Patent number: 8797025
    Abstract: A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in a digital loop controller. The digital loop controller may be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current and/or a function thereof reach the respective desired levels. The digital loop controller may implement respective integrating functions for the respective digital control loops, and may also implement a compensation function featuring pole-zero pairs to stabilize the respective current/voltage outputs. Coefficients of the compensation function may be calculated based on user programmable parameters corresponding to the gain bandwidth product, compensation frequency, and ratio of the added pole-zero frequencies.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: August 5, 2014
    Assignee: National Instruments Corporation
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz
  • Patent number: 8653840
    Abstract: A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in a digital loop controller (DLC). The DLC may be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current and/or a function thereof reach the respective desired levels. The DLC may perform a threshold check to determine if the output current is outside a specified measurable range, and generate an override signal to drive the DAC to rapidly return the output current to the measurable range. Once the current is within the measurable range, the DAC may once again be driven according to the respective digital control loops for the output voltage and the output current.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: February 18, 2014
    Assignee: National Instruments Corporation
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz
  • Patent number: 8604765
    Abstract: A source-measure unit (SMU) may be implemented with digital control loops. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters), and the readings obtained by the ADCs may be compared to a setpoint in a digital loop controller, which may produce an output to drive a DAC (digital-to-analog converter) to maintain the output voltage and/or output current at a desired setpoint. The digital loop controller may also digitally implement simulated resistance with high resolution, accuracy, and range, using Thévenin and Norton power supply models. Simulated resistor values may range from 10? to 10? for output currents in the 100 mA range, with a sub-200?? resolution. The range may be expanded up to 100 k? for output currents in the 10 ?A range. The Norton and Thévenin implementations may be combined, and a “pure resistance” mode may be created for simulating any desired resistance value.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: December 10, 2013
    Assignee: National Instruments Corporation
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz
  • Patent number: 8456338
    Abstract: A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The digital control loop associated with the output that is being regulated may be the setpoint control loop while the digital control loop associated with the other output may be the compliance control loop. The digital loop controller may switch between the setpoint control loop and the compliance control loop without generating a mode-change glitch, by maintaining a single integrator. The compliance methods may differ in how and when the decision is made to select which of the measured signals provides the error signal to the integrator. Thus, there may be no issue with integrator wind-up, which might be the case if there were two complete control loops operating continuously.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: June 4, 2013
    Assignee: National Instruments Corporation
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz
  • Publication number: 20120306518
    Abstract: A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in a digital loop controller (DLC). The DLC may be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current and/or a function thereof reach the respective desired levels. The DLC may perform a threshold check to determine if the output current is outside a specified measurable range, and generate an override signal to drive the DAC to rapidly return the output current to the measurable range. Once the current is within the measurable range, the DAC may once again be driven according to the respective digital control loops for the output voltage and the output current.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz
  • Publication number: 20120306517
    Abstract: A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in a digital loop controller. The digital loop controller may be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current and/or a function thereof reach the respective desired levels. The digital loop controller may implement respective integrating functions for the respective digital control loops, and may also implement a compensation function featuring pole-zero pairs to stabilize the respective current/voltage outputs. Coefficients of the compensation function may be calculated based on user programmable parameters corresponding to the gain bandwidth product, compensation frequency, and ratio of the added pole-zero frequencies.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz
  • Publication number: 20120306559
    Abstract: A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The digital control loop associated with the output that is being regulated may be the setpoint control loop while the digital control loop associated with the other output may be the compliance control loop. The digital loop controller may switch between the setpoint control loop and the compliance control loop without generating a mode-change glitch, by maintaining a single integrator. The compliance methods may differ in how and when the decision is made to select which of the measured signals provides the error signal to the integrator. Thus, there may be no issue with integrator wind-up, which might be the case if there were two complete control loops operating continuously.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz
  • Publication number: 20120306460
    Abstract: A source-measure unit (SMU) may be implemented with digital control loops. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters), and the readings obtained by the ADCs may be compared to a setpoint in a digital loop controller, which may produce an output to drive a DAC (digital-to-analog converter) to maintain the output voltage and/or output current at a desired setpoint. The digital loop controller may also digitally implement simulated resistance with high resolution, accuracy, and range, using Thévenin and Norton power supply models. Simulated resistor values may range from 10? to 10? for output currents in the 100 mA range, with a sub-200?? resolution. The range may be expanded up to 100 k? for output currents in the 10 ?A range. The Norton and Thévenin implementations may be combined, and a “pure resistance” mode may be created for simulating any desired resistance value.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventors: Christopher G. Regier, L. Rolando Ortega-Pohlenz