Abstract: A time-modulated delay system having an input and a plurality of time-modulated output taps including storage means having a multiplicity of storage locations for storing successive portions of an interval of the input signal; a write address generator circuit for designating the address of locations in the storage means in which the successive portions of the input signal are stored; an output tap identifier circuit for sequentially identifying each output tap; a read address generator circuit responsive to the tap identifier circuit for designating a random address in the storage means from which a portion of the input signal is to be read for each time-modulated tap identified to produce a random modulation of the temporal pattern of the output taps; and a distribution circuit, responsive to the output tap identifier circuit, for delivering each portion of the input signal read out of the storage means to the corresponding identified tap.

Abstract: A reverberation simulator which includes a delay system having a plurality of temporally fixed output delay taps and a plurality of time-modulated delay output taps. A first mixer circuit combines the output of the plurality of time-modulated taps to produce a feedback signal. A second mixer circuit combines the feedback signal and an audio input signal for submission to the delay system. A third mixer circuit combines the audio input signal and the outputs from the plurality of temporally fixed taps to produce a simulated reverberated audio output signal.