Abstract: Disclosed herein are representative embodiments of methods, apparatus, and systems used to deliver a prosthetic heart valve to a deficient valve. In one embodiment, for instance, a support structure and an expandable prosthetic valve are advanced through the aortic arch of a patient using a delivery system. The support structure is delivered to a position on or adjacent to the surface of the outflow side of the aortic valve (the support structure defining a support-structure interior). The expandable prosthetic valve is delivered into the aortic valve and into the support-structure interior. The expandable prosthetic heart valve is expanded while the expandable prosthetic heart valve is in the support-structure interior and while the support structure is at the position on or adjacent to the surface of the outflow side of the aortic valve, thereby causing one or more native leaflets of the aortic valve to be frictionally secured between the support structure and the expanded prosthetic heart valve.

Abstract: Examples of electronic devices are described herein. In some examples, an electronic device includes an operating system (OS). In some examples, the electronic device includes a basic input/output system (BIOS). In some examples, the electronic device includes an OS certificate store. In some examples, the electronic device includes a processor to load a certificate from the BIOS. In some examples, the OS certificate store is bypassed during the loading of the certificate. In some examples, the processor is to execute a program in the OS to verify signed instructions based on the certificate.

Abstract: In an example implementation according to aspects of the present disclosure, a method may include receiving by a controller a BIOS image, extracting a current manufacturing programming mode state corresponding to a computer system. A BIOS personality of the BIOS image is evaluated, wherein the BIOS personality is based on a differentiation of hardware and software functionality. Based on the current manufacturing programming state and the BIOS personality, a compatibility with the computer system is determined. Based on the compatibility, the BIOS image is written to non-volatile memory.

Abstract: A computer system includes an independent compute core; and an isolated secure data storage device to store data accessible only to the independent compute core. The independent compute core is to open an Application Program Interface (API) during runtime of the computer system in response to receiving a verified message containing secure data to be written to the secure data storage device.

Abstract: In some examples, a device includes a memory, a processor, and a controller separate from the processor to derive a security credential based on information comprising a key accessible by the controller. The controller communicates the derived security credential in a secure manner to a program code executable on the processor, and uses the derived security credential to protect data stored in the memory against unauthorized access.

Abstract: The update progress of a basic input/output system (BIOS) is displayed on a display screen. A first chipset lock is applied to a first region of a shared serial peripheral interface (SPI) chip of the BIOS of a computer system containing a first program of instructions. A system management memory mode lock is applied to a second and a third region of the shared SPI chip containing a second and third programs of instructions respectively. The second program of instructions is updated, and control of the BIOS is transferred to the updated second program of instructions. The updated second program of instructions updates the first program of instructions. The BIOS update progress visual is displayed on the display screen of the computer system while updating the first program of instructions.

Abstract: According to examples, an apparatus may include a memory storing a firmware and a processor. The processor may receive a request to modify the firmware, in which the request may be associated with a first credential. The processor may also determine, based on the first credential, whether modification of the firmware is authorized and based on a determination that modification of the firmware is authorized, display a set of defined functionalities for the firmware that are authorized to be modified. The processor may further receive a modification to a functionality in the set of defined functionalities that are authorized to be modified and may apply the received modification to the functionality.

Abstract: According to examples, an apparatus may include a processor that may delete portions of firmware instructions responsive to an indication that the portions should be disabled. To facilitate the foregoing, the firmware instructions may be deployed in a segmented architecture stored in respective regions of a storage device. The regions may include a metadata region, a main region, and excludable regions. The metadata region may store metadata that describes the structure of the firmware instructions and/or the various other regions. The main region may store core firmware instructions that may not be deleted. Each excludable region may store respective excludable firmware instructions. Each excludable firmware instructions may be associated with a flag that indicates whether or not the instructions should be disabled. If so, the corresponding excludable region in the storage device is identified and the contents may be removed, permanently disabling the excludable firmware instructions that were stored there.

Abstract: In an example implementation according to aspects of the present disclosure, a method may include receiving by a controller a BIOS image, extracting a current manufacturing programming mode state corresponding to a computer system. A BIOS personality of the BIOS image is evaluated, wherein the BIOS personality is based on a differentiation of hardware and software functionality. Based on the current manufacturing programming state and the BIOS personality, a compatibility with the computer system is determined. Based on the compatibility, the BIOS image is written to non-volatile memory.

Abstract: In some examples, a device includes a memory, a processor, and a controller separate from the processor to derive a security credential based on information comprising a key accessible by the controller. The controller communicates the derived security credential in a secure manner to a program code executable on the processor, and uses the derived security credential to protect data stored in the memory against unauthorized access.

Abstract: Examples associated with boot data validity are described. One example includes determining whether NVRAM boot data structure is valid. When the NVRAM boot data structure is valid, a NVRAM boot data structure validity flag is set to indicate the boot data structure is invalid. The validity flag is set to indicate the NVRAM boot data structure is valid once a point in a startup process is reached that indicates the startup process will complete successfully. When the NVRAM boot data structure is invalid, errors identified in the NVRAM boot data structure are repaired, and the startup process is restarted.

Abstract: In an example implementation according to aspects of the present disclosure, a method may include receiving by a controller a BIOS image, extracting a current manufacturing programming mode state corresponding to a computer system. A BIOS personality of the BIOS image is evaluated, wherein the BIOS personality is based on a differentiation of hardware and software functionality. Based on the current manufacturing programming state and the BIOS personality, a compatibility with the computer system is determined. Based on the compatibility, the BIOS image is written to non-volatile memory.

Abstract: Examples associated with boot data validity are described. One example includes determining whether NVRAM boot data structure is valid. When the NVRAM boot data structure is valid, a NVRAM boot data structure validity flag is set to indicate the boot data structure is invalid. The validity flag is set to indicate the NVRAM boot data structure is valid once a point in a startup process is reached that indicates the startup process will complete successfully. When the NVRAM boot data structure is invalid, errors identified in the NVRAM boot data structure are repaired, and the startup process is restarted.

Abstract: The update progress of a basic input/output system (BIOS) is displayed on a display screen. A first chipset lock is applied to a first region of a shared serial peripheral interface (SPI) chip of the BIOS of a computer system containing a first program of instructions. A system management memory mode lock is applied to a second and a third region of the shared SPI chip containing a second and third programs of instructions respectively. The second program of instructions is updated, and control of the BIOS is transferred to the updated second program of instructions. The updated second program of instructions updates the first program of instructions. The BIOS update progress visual is displayed on the display screen of the computer system while updating the first program of instructions.

Abstract: In example implementations, an apparatus is provided. The apparatus includes a controller, a memory protection policy, an electrically isolated memory, and a non-volatile memory. The memory protection policy includes an allowable write function. The electrically isolated memory is to store code executable by the controller to execute a requested write function based on the set of memory protections. The non-volatile memory is in communication with the controller. The requested write function is to be executed in the non-volatile memory when the requested write function matches the allowable write function.

Abstract: An example device comprises a plurality of components and a BIOS includes a non-volatile memory having instructions stored thereon that are executable by a processor of the device to cause the BIOS to determine a component identification (ID) of a component of the plurality of components, and fetch a plurality of recall component IDs. The instructions also are to cause the BIOS to compare the determined component ID with the plurality of recall component IDs. In response to a correspondence between the determined component ID and one recall component ID of the plurality of component IDs, the BIOS is to transmit signals representing a prompt to place the component of the plurality of components in a safety mode. The instructions also cause the BIOS to receive signals in response to the prompt and, responsive to the received signals, disable the component of the plurality of components.

Abstract: Systems and methods employing rule based techniques for handling virtual entity manifestation into gameplay modes in accordance with gameplay restrictions of the individual gameplay modes. The system may comprise a host server including one or more processors configured to execute computer program modules. The computer program modules may comprise a game module configured to execute an instance of the online game and to facilitate participation in one or more gameplay modes, a rule module configured to maintain rules corresponding to the restrictions for manifesting virtual entities into the individual gameplay modes, a creation module configured to create manifests including information corresponding to the rules for each gameplay mode, a determination module configured to determine which rules to apply to the virtual entities, and an application module configured to apply the rules according to the determinations.

Abstract: Examples associated with basic input/output system (BIOS) up-dates are described. One example method includes system management mode locking a first pre-extensible firmware interface initialization (PEI) region and a driver execution environment (DXE) region of a shared serial peripheral (SPI) chip of a BIOS of a computer. A second PEI region of the shared SPI chip is chipset locked. A record in a system management random access memory associated with a video option read only memory (ROM) is created. The video option ROM is loaded. The first PEI region is updated, and periodic graphical updates regarding the progress of updating the first PEI region are provided using the video option ROM.

Abstract: Examples herein disclose a command to control a use of a test key for installation of a test basic input output system (BIOS). The examples validate a command and replace at least a portion of a production BIOS with the test BIOS based on an allowance of the test key.

Abstract: A build indicator is set in a build environment to a set value for building a program code, the set value selected from a first value indicating that a feature of the program code is enabled, and a second value indicating that the feature is disabled. In response to the set value of the build indicator being the first value, a variable is set to a value indicating that the feature is enabled. The program code is built using the value of the variable.