Abstract: A III-V/SiNx hybrid integrated photonics platform is described. A wafer can include regions where SiNx waveguides are formed and regions where III-V waveguides have been grown heteroepitaxially from the Si substrate and formed lithographically to butt couple to the SiNx waveguides. Efficient optical coupling is possible between the SiNx and III-V waveguides (?2.5 dB loss/transition). A threading dislocation density (TDD) as low as 4×106 cm?2 can be obtained in the III-V waveguides. The TDD enables fully parallel fabrication of integrated III-V optoelectronic devices, allowing for complex photonic integrated circuits with many active components.

Abstract: A III-V optoelectronic light emitting device is epitaxially formed on a semiconductor on insulator substrate over a buried waveguide core. The device is optically coupled to the underlying waveguide core. A MOSFET device is formed on a semiconductor substrate beneath the insulator that contains the waveguide core.

Abstract: A semiconductor device includes a mesa structure having vertical sidewalls, the mesa structure including an active area comprising a portion of its height. A stressed passivation liner is formed on the vertical sidewalls of the mesa structure and over the portion of the active area. The stressed passivation liner induces strain in the active area to permit tuning of performance parameters of the mesa structure.

Abstract: A semiconductor device includes a mesa structure having vertical sidewalls, the mesa structure including an active area comprising a portion of its height. A stressed passivation liner is formed on the vertical sidewalls of the mesa structure and over the portion of the active area. The stressed passivation liner induces strain in the active area to permit tuning of performance parameters of the mesa structure.