Abstract: Systems and methods disclosed herein provide for variable data width memory. For example, in accordance with an embodiment of the present invention, a technique for doubling a width of a memory is disclosed, without having to increase a width of the internal data path or the number of input/output pads.

Abstract: Systems and methods disclosed herein provide for variable data width memory. For example, in accordance with an embodiment of the present invention, a technique for doubling a width of a memory is disclosed, without having to increase a width of the internal data path or the number of input/output pads.

Abstract: Systems and methods are disclosed herein to provide techniques for writing to certain bits of a word location in a memory. For example, in accordance with an embodiment of the present invention, a method of implementing byte enable logic for a memory is disclosed, with the byte enable logic signals provided on one or more address lines.

Abstract: In accordance with an embodiment of the present invention, a programmable logic device includes a plurality of logic blocks, a plurality of memory blocks, and a plurality of continuation routing paths associated with the memory blocks. A plurality of continuation multiplexers, coupled to the continuation routing paths, are adapted to route signals between the memory blocks, between the logic blocks, and/or between the memory blocks and the logic blocks.

Abstract: In accordance with one embodiment of the present invention, a programmable logic device includes at least one block of memory having a plurality of memory cells and a plurality of fuses adapted to provide a first set of signals that determines a first configuration for the at least one block of memory. A plurality of multiplexers are adapted to select the first set of signals from the plurality of fuses to configure the at least one block of memory in the first configuration or a second set of signals to configure the at least one block of memory in a second configuration.

Abstract: Systems and methods provide output data from a memory. For example, in accordance with an embodiment of the present invention, techniques are disclosed for providing glitch-free output data from a memory through feedback of the output data signal.

Abstract: Systems and methods provide output data from a memory. For example, in accordance with an embodiment of the present invention, techniques are disclosed for providing glitch-free output data from a memory through feedback of the output data signal.

Abstract: Systems and methods provide metastability-resistant techniques. For example, in accordance with an embodiment of the present invention, a flip flop is disclosed having a dynamic gain skewed to provide metastability resistance.

Abstract: Systems and methods are disclosed herein to provide techniques for writing to certain bits of a word location in a memory. For example, in accordance with an embodiment of the present invention, a method of implementing byte enable logic for a memory is disclosed, with the byte enable logic signals provided on one or more address lines.

Abstract: An equipment enclosure comprises a frame whereon edge covers can be assembled by means of lugs fitting into corresponding recesses in the frame. Each of the edge covers comprises a groove overhanging the frame on either side to form a continuous channel all around. Covers are slidably insertable into the continuous groove to trap the lugs in the recesses to prevent the removal of the edge covers, the edge covers in turn co-operating to retain the side covers. A back cover is boltable onto the frame to prevent the sliding out of the side covers and to complete the assembly of the enclosure. The edge covers are provided with projections and slots which are insertable one into the other between adjacent covers to lend added strength to the enclosure. In a modification to the invention an openable portion of the enclosure is provided.