Abstract: Implementations of wide atomic sequences are achieved by augmenting a load operation designed to initiate an atomic sequence and augmenting a conditional storing operation that typically terminates the atomic sequence. The augmented load operation is designed to further allocate a memory buffer besides initiating the atomic sequence. The conditional storing operation is augmented to check the allocated memory buffer for any data stored therein. If one or more data words are detected in the memory buffer, the conditional storing operation stores the detected data word(s) and another word provided as operand in a concatenation of memory locations. The achieved wide atomic sequences enable the hardware system to support wide memory operations and wide operations in general.

Abstract: According to at least one example embodiment, a method and corresponding apparatus for conditionally storing data include initiating an atomic sequence by executing, by a core processor, an instruction/operation designed to initiate an atomic sequence. Executing the instruction designed to initiate the atomic sequence includes loading content associated with a memory location into a first cache memory, and maintaining an indication of the memory location and a copy of the corresponding content loaded. A conditional storing operation is then performed, the conditional storing operation includes a compare-and-swap operation, executed by a controller associated with a second cache memory, based on the maintained copy of the content and the indication of the memory location.

Abstract: Implementations of wide atomic sequences are achieved by augmenting a load operation designed to initiate an atomic sequence and augmenting a conditional storing operation that typically terminates the atomic sequence. The augmented load operation is designed to further allocate a memory buffer besides initiating the atomic sequence. The conditional storing operation is augmented to check the allocated memory buffer for any data stored therein. If one or more data words are detected in the memory buffer, the conditional storing operation stores the detected data word(s) and another word provided as operand in a concatenation of memory locations. The achieved wide atomic sequences enable the hardware system to support wide memory operations and wide operations in general.

Abstract: According to at least one example embodiment, a method and corresponding apparatus for conditionally storing data include initiating an atomic sequence by executing, by a core processor, an instruction/operation designed to initiate an atomic sequence. Executing the instruction designed to initiate the atomic sequence includes loading content associated with a memory location into a first cache memory, and maintaining an indication of the memory location and a copy of the corresponding content loaded. A conditional storing operation is then performed, the conditional storing operation includes a compare-and-swap operation, executed by a controller associated with a second cache memory, based on the maintained copy of the content and the indication of the memory location.