Patents by Inventor Christopher J. Ellingham

Christopher J. Ellingham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Testing integrated circuit designs on a computer simulation using modified serialized scan patterns
    Patent number: 5923836
    Abstract: A method to test an integrated circuit design on a computer simulation loads a desired simulation test vector in parallel into a scan chain (30). The simulation loads the desired vector at a slight offset or upstream shift allowing several serial shifts of the loaded vector through the scan chain (32). After the serial shifts, the initial IC state is set for executing an IC function (34). The IC function includes applying an input on the external pins and receiving an output from the external pins, given the initial IC state loaded by the simulation After executing the IC function, the simulation unloads the resulting IC state in parallel (36) and compares the resulting IC state to a target vector (38).
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: July 13, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Phillip T. Barch, Christopher J. Ellingham, Frederick L. Wagner, John R. Larkin
  • Testing integrated circuit designs on a computer simulation using modified serialized scan patterns
    Patent number: 5574853
    Abstract: A method to test an integrated circuit design on a computer simulation loads a desired simulation test vector in parallel into a scan chain (30). The simulation loads the desired vector at a slight offset or upstream shift allowing several serial shifts of the loaded vector through the scan chain (32). After the serial shifts, the initial IC state is set for executing an IC function (34). The IC function includes applying an input on the external pins and receiving an output from the external pins, given the initial IC state loaded by the simulation. After executing the IC function, the simulation unloads the resulting IC state in parallel (36) and compares the resulting IC state to a target vector (38).
    Type: Grant
    Filed: January 3, 1994
    Date of Patent: November 12, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Phillip T. Barch, Christopher J. Ellingham, Frederick L. Wagner, John R. Larkin