Patents by Inventor Christopher J. Farey

Christopher J. Farey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10860214
    Abstract: The various embodiments described herein include methods, devices, and systems for processing memory operation requests. In one aspect, a method is performed at a computing system having one or more processors and non-volatile memory: (1) obtaining a plurality of internal memory operation requests for the non-volatile memory, the plurality of internal memory operation requests originating from within the computing system; (2) obtaining a plurality of external memory operation requests for the non-volatile memory, the plurality of external memory operation requests originating from one or more devices remote and distinct from the computing system; and (3) regulating a rate at which the plurality of internal memory operation requests are transferred to the non-volatile memory based on an amount of external memory operation requests in the plurality of external memory requests.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: December 8, 2020
    Assignee: STORMAGIC LIMITED
    Inventor: Christopher J. Farey
  • Patent number: 10489299
    Abstract: The various embodiments described herein include methods, devices, and systems for caching data. In one aspect, a method is performed at a computing system having one or more processors and memory including a plurality of distinct memory types each assigned to a respective memory tier of a plurality of memory tiers based on a read latency of the memory type. The method includes: (1) identifying a plurality of extents, including a first extent, each of the extents comprising a respective set of related data stored within the memory; (2) determining a first read frequency for the first extent; and (3) storing the first extent in a particular memory tier of the plurality of distinct memory tiers based on the determined first read frequency.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: November 26, 2019
    Assignee: STORMAGIC LIMITED
    Inventor: Christopher J. Farey
  • Publication number: 20190155515
    Abstract: The various embodiments described herein include methods, devices, and systems for processing memory operation requests. In one aspect, a method is performed at a computing system having one or more processors and non-volatile memory: (1) obtaining a plurality of internal memory operation requests for the non-volatile memory, the plurality of internal memory operation requests originating from within the computing system; (2) obtaining a plurality of external memory operation requests for the non-volatile memory, the plurality of external memory operation requests originating from one or more devices remote and distinct from the computing system; and (3) regulating a rate at which the plurality of internal memory operation requests are transferred to the non-volatile memory based on an amount of external memory operation requests in the plurality of external memory requests.
    Type: Application
    Filed: November 17, 2017
    Publication date: May 23, 2019
    Inventor: Christopher J. Farey
  • Publication number: 20180165208
    Abstract: The various embodiments described herein include methods, devices, and systems for caching data. In one aspect, a method is performed at a computing system having one or more processors and memory including a plurality of distinct memory types each assigned to a respective memory tier of a plurality of memory tiers based on a read latency of the memory type. The method includes: (1) identifying a plurality of extents, including a first extent, each of the extents comprising a respective set of related data stored within the memory; (2) determining a first read frequency for the first extent; and (3) storing the first extent in a particular memory tier of the plurality of distinct memory tiers based on the determined first read frequency.
    Type: Application
    Filed: March 13, 2017
    Publication date: June 14, 2018
    Inventor: Christopher J. Farey