Patents by Inventor Christopher J. Rossbach
Christopher J. Rossbach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11573817Abstract: Examples provide a method of virtualizing a hardware accelerator in a virtualized computing system. The virtualized computing system includes a hypervisor supporting execution of a plurality of virtual machines (VMs). The method includes: receiving a plurality of sub-programs at a compiler in the hypervisor from a plurality of compilers in the respective plurality of VMs, each of the sub-programs including a hardware-description language (HDL) description; combining, at the compiler in the hypervisor, the plurality of sub-programs into a monolithic program; generating, by the compiler in the hypervisor, a circuit implementation for the monolithic program, the circuit implementation including a plurality of sub-circuits for the respective plurality of sub-programs; and loading, by the compiler in the hypervisor, the circuit implementation to a programmable device of the hardware accelerator.Type: GrantFiled: July 21, 2020Date of Patent: February 7, 2023Assignee: VMware, Inc.Inventors: Eric Schkufza, Christopher J. Rossbach
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Publication number: 20220027181Abstract: Examples provide a method of virtualizing a hardware accelerator in a virtualized computing system. The virtualized computing system includes a hypervisor supporting execution of a plurality of virtual machines (VMs). The method includes: receiving a plurality of sub-programs at a compiler in the hypervisor from a plurality of compilers in the respective plurality of VMs, each of the sub-programs including a hardware-description language (HDL) description; combining, at the compiler in the hypervisor, the plurality of sub-programs into a monolithic program; generating, by the compiler in the hypervisor, a circuit implementation for the monolithic program, the circuit implementation including a plurality of sub-circuits for the respective plurality of sub-programs; and loading, by the compiler in the hypervisor, the circuit implementation to a programmable device of the hardware accelerator.Type: ApplicationFiled: July 21, 2020Publication date: January 27, 2022Inventors: Eric SCHKUFZA, Christopher J. ROSSBACH
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Patent number: 10635600Abstract: The disclosure provides an approach for tracking metadata (e.g., accessed and dirty bits) of page tables at finer granularity than the size of the page tables. A disclosed herein, modification to existing hardware design may enable finer page table granularity of metadata, leading to more precise representation of the state of memory and an improvement to system performance and efficiency. Finer grain dirty metadata can dramatically improve the efficiency and simplicity of subsystems.Type: GrantFiled: March 8, 2018Date of Patent: April 28, 2020Assignee: VMware, Inc.Inventors: Jayneel Gandhi, Christopher J. Rossbach, Timothy Merrifield
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Publication number: 20190278713Abstract: The disclosure provides an approach for tracking metadata (e.g., accessed and dirty bits) of page tables at finer granularity than the size of the page tables. A disclosed herein, modification to existing hardware design may enable finer page table granularity of metadata, leading to more precise representation of the state of memory and an improvement to system performance and efficiency. Finer grain dirty metadata can dramatically improve the efficiency and simplicity of subsystems.Type: ApplicationFiled: March 8, 2018Publication date: September 12, 2019Inventors: Jayneel GANDHI, Christopher J. ROSSBACH, Timothy MERRIFIELD
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Patent number: 9996394Abstract: An application programming interface is provided that allows programmers to encapsulate snippets of executable code of a program into accelerator tasks. A graph is generated with a node corresponding to each of the accelerator tasks with edges that represent the data flow and data dependencies between the accelerator tasks. The generated graph is used by a scheduler to schedule the execution of the accelerator tasks across multiple accelerators. The application programming interface further provides an abstraction of the various memories of the accelerators called a datablock. The programmer can store and use data stored on the datablocks without knowing where on the accelerators the data is stored. The application programming interface can further schedule the execution of accelerator tasks to minimize the amount of data that is copied to and from the accelerators based on the datablocks and the generated graph.Type: GrantFiled: March 1, 2012Date of Patent: June 12, 2018Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Christopher J. Rossbach, Jonathan James Currey
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Patent number: 8661449Abstract: Computations are performed on shared datasets in a distributed computing cluster using aggressive speculation and a distributed runtime that executes code transactionally. Speculative transactions are conducted with currently available data on the assumption that no dependencies exist that will render the input data invalid. For those specific instances where this assumption is found to be incorrect—that the input data did indeed have a dependency (thereby impacting the correctness of the speculated transaction)—the speculated transaction is aborted and its results (and all transactions that relied on its results) are rolled-back accordingly for re-computation using updated input data. In operation, shared state data is read and written using only the system's data access API which ensures that computations can be rolled-back when conflicts stemming from later-determined dependencies are detected.Type: GrantFiled: June 17, 2011Date of Patent: February 25, 2014Assignee: Microsoft CorporationInventors: Christopher J. Rossbach, Jean-Philippe Martin, Michael Isard
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Publication number: 20130232495Abstract: An application programming interface is provided that allows programmers to encapsulate snippets of executable code of a program into accelerator tasks. A graph is generated with a node corresponding to each of the accelerator tasks with edges that represent the data flow and data dependencies between the accelerator tasks. The generated graph is used by a scheduler to schedule the execution of the accelerator tasks across multiple accelerators. The application programming interface further provides an abstraction of the various memories of the accelerators called a datablock. The programmer can store and use data stored on the datablocks without knowing where on the accelerators the data is stored. The application programming interface can further schedule the execution of accelerator tasks to minimize the amount of data that is copied to and from the accelerators based on the datablocks and the generated graph.Type: ApplicationFiled: March 1, 2012Publication date: September 5, 2013Applicant: Microsoft CorporationInventors: Christopher J. Rossbach, Jonathan James Currey
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Publication number: 20120324472Abstract: Computations are performed on shared datasets in a distributed computing cluster using aggressive speculation and a distributed runtime that executes code transactionally. Speculative transactions are conducted with currently available data on the assumption that no dependencies exist that will render the input data invalid. For those specific instances where this assumption is found to be incorrect—that the input data did indeed have a dependency (thereby impacting the correctness of the speculated transaction)—the speculated transaction is aborted and its results (and all transactions that relied on its results) are rolled-back accordingly for re-computation using updated input data. In operation, shared state data is read and written using only the system's data access API which ensures that computations can be rolled-back when conflicts stemming from later-determined dependencies are detected.Type: ApplicationFiled: June 17, 2011Publication date: December 20, 2012Applicant: Microsoft CorporationInventors: Christopher J. Rossbach, Jean-Philippe Martin, Michael Isard
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Patent number: 8134637Abstract: An imaging system substantially simultaneously acquires z-depth and brightness data from first sensors, and acquires higher resolution RGB data from second sensors, and fuses data from the first and second sensors to model an RGBZ image whose resolution can be as high as resolution of the second sensors. Time correlation of captured data from first and second sensors is associated with captured image data, which permits arbitrary mapping between the two data sources, ranging from 1:many to many:1. Preferably pixels from each set of sensors that image the same target point are mapped. Many z-depth sensor settings may be used to create a static environmental model. Non-correlative and correlative filtering is carried out, and up-sampling to increase z-resolution occurs, from which a three-dimensional model is constructed using registration and calibration data.Type: GrantFiled: June 1, 2006Date of Patent: March 13, 2012Assignee: Microsoft CorporationInventors: Christopher J. Rossbach, Abbas Rafii, Peiqian Zhao