Patents by Inventor Christopher J. Sarcone

Christopher J. Sarcone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10089266
    Abstract: Disclosed herein is a technique for maintaining a responsive user interface for a user while preserving battery life of a user device by dynamically determining the interrupt rate/interrupt time at the user device. Based on priority tier information associated with the I/O requests along with the directionality and size of the I/O requests, a determination can be made regarding how the interrupt rate/interrupt time can be adjusted to achieve acceptable user interface (UI) responsiveness and maximum power savings.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: October 2, 2018
    Assignee: Apple Inc.
    Inventors: Christopher J. Sarcone, Manoj K. Radhakrishnan, Etai Zaltsman
  • Patent number: 10025370
    Abstract: The disclosed embodiments provide a system that operates a processor in a computer system. During operation, the system uses the processor to maintain a count of outstanding input/output (I/O) requests for a component in the computer system. Next, the system facilitates efficient execution of the processor by overriding a latency tolerance reporting (LTR) value for the component based on the count.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: July 17, 2018
    Assignee: APPLE INC.
    Inventors: Sergio J. Henriques, Manoj K. Radhakrishnan, Christopher J. Sarcone
  • Patent number: 9959042
    Abstract: Disclosed herein is a technique for dynamically scaling a low-power self-refresh (LPSR) idle interval associated with a solid state drive (SSD) of a user device in order to promote enhanced battery life efficiency within the user device. A determination can be made regarding whether the LPSR idle interval is to be scaled up or scaled down. Specifically, the determination is based on a total elapsed since the user device was first powered on and a total number of LPSR transitions or cycles that have been performed in association with the SSD. In turn, the dynamic scaling of the LPSR idle intervals causes NAND power-cycles to be consumed responsibly over an average system lifetime of the user device, which can result in better power management at the user device.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: May 1, 2018
    Assignee: Apple Inc.
    Inventors: Bhaskar R. Adavi, Christopher J. Sarcone, Manoj K. Radhakrishnan
  • Patent number: 9727248
    Abstract: A storage system having an input-output (IO) component, a solid state drive (SSD) with multiple logical units (LUNs), e.g., flash storage units, and a controller coupled to the IO component and the SSD. The controller can cause the storage system to receive an operation request, determine various operational throughputs associated with outstanding commands of the SSD (e.g., read or write commands to be performed by the SSD), determine a time required for the SSD to process the outstanding commands based in part on the operational throughputs, and assign a timeout value to the received operation request. The timeout value may correspond to the time required for the SSD to process the outstanding commands. Any of the operational throughputs may be throttled when a die temperature of any of the SSD's LUNs exceeds an operating temperature threshold, or when an ambient temperature affecting SSD exceeds an ambient temperature threshold.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: August 8, 2017
    Assignee: Apple Inc.
    Inventors: Christopher J. Sarcone, Manoj K. Radhakrishnan
  • Patent number: 9582204
    Abstract: A method for data storage, includes holding a definition of a speculative readout mode for readout in a storage device, in which the storage device is requested to read a data unit having a data unit size, and in response the storage device retrieves a storage page that contains the data unit and has a storage page size larger than the data unit size, and retains the storage page in preparation for subsequent requests. Activation of the speculative readout mode is coordinated. A readout command using the speculative readout mode is performed.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: February 28, 2017
    Assignee: Apple Inc.
    Inventors: Christopher J Sarcone, Shai Ojalvo
  • Publication number: 20170052583
    Abstract: Disclosed herein is a technique for dynamically scaling a low-power self-refresh (LPSR) idle interval associated with a solid state drive (SSD) of a user device in order to promote enhanced battery life efficiency within the user device. A determination can be made regarding whether the LPSR idle interval is to be scaled up or scaled down. Specifically, the determination is based on a total elapsed since the user device was first powered on and a total number of LPSR transitions or cycles that have been performed in association with the SSD. In turn, the dynamic scaling of the LPSR idle intervals causes NAND power-cycles to be consumed responsibly over an average system lifetime of the user device, which can result in better power management at the user device.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 23, 2017
    Inventors: Bhaskar R. ADAVI, Christopher J. SARCONE, Manoj K. RADHAKRISHNAN
  • Patent number: 9568971
    Abstract: A storage device includes a non-volatile memory, a volatile memory and a controller. The volatile memory supports a normal mode and a self-refresh mode. The controller is configured to store data for a host in the non-volatile memory while using the volatile memory in the normal mode and, in response to receiving a power-down command from the host, to deactivate at least part of the storage device and to switch the volatile memory from the normal mode to the self-refresh mode.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: February 14, 2017
    Assignee: APPLE INC.
    Inventors: Avraham Poza Meir, Evan R. Boyle, Christopher J. Sarcone, Barak Rotbard
  • Publication number: 20170010992
    Abstract: Disclosed herein is a technique for maintaining a responsive user interface for a user while preserving battery life of a user device by dynamically determining the interrupt rate/interrupt time at the user device. Based on priority tier information associated with the I/O requests along with the directionality and size of the I/O requests, a determination can be made regarding how the interrupt rate/interrupt time can be adjusted to achieve acceptable user interface (UI) responsiveness and maximum power savings.
    Type: Application
    Filed: July 10, 2015
    Publication date: January 12, 2017
    Inventors: Christopher J. SARCONE, Manoj K. RADHAKRISHNAN, Etai ZALTSMAN
  • Patent number: 9417794
    Abstract: A composite memory device that includes different types of non-volatile memory devices, which have different performance characteristics, is described. This composite memory device may receive requests, a given one of which includes a command, a logical address for at least a block of data associated with the command, and a hint associated with the command. For the given request, the composite memory device executes the command on the block of data at the logical address in at least one of the types of non-volatile memory devices. Furthermore, the composite memory device conditionally executes the hint based on one or more criteria, such as: available memory in the types of non-volatile memory devices, traffic through an interface circuit in the composite memory device, operational states of the types of non-volatile memory devices, a target performance characteristic of the composite memory device, and an environmental condition of the composite memory device.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: August 16, 2016
    Assignee: Apple Inc.
    Inventors: Cheng P. Tan, Khalu C. Bazzani, Sergio J. Henriques, Christopher J. Sarcone, Joseph Sokol, Jr., Dominic B. Giampaolo
  • Publication number: 20160231797
    Abstract: A storage device includes a non-volatile memory, a volatile memory and a controller. The volatile memory supports a normal mode and a self-refresh mode. The controller is configured to store data for a host in the non-volatile memory while using the volatile memory in the normal mode and, in response to receiving a power-down command from the host, to deactivate at least part of the storage device and to switch the volatile memory from the normal mode to the self-refresh mode.
    Type: Application
    Filed: February 5, 2015
    Publication date: August 11, 2016
    Inventors: Avraham Poza Meir, Evan R. Boyle, Christopher J. Sarcone, Barak Rotbard
  • Patent number: 9152825
    Abstract: The disclosed embodiments provide a system that secures data transfer between a storage device and a host. During operation, the system obtains an input/output (I/O) command and an encryption context associated with the I/O command from a device driver executing on the host. Next, the system uses a storage controller bus interface between the host and the storage device to apply the encryption context to data associated with the I/O command, wherein the encryption context enables transmission of an encrypted form of the data between the storage device and the host. Finally, the system uses the storage controller bus interface to issue the I/O command to the storage device, wherein the I/O command is processed by the storage device.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: October 6, 2015
    Assignee: Apple Inc.
    Inventor: Christopher J. Sarcone
  • Publication number: 20150220278
    Abstract: A storage system having an input-output (IO) component, a solid state drive (SSD) with multiple logical units (LUNs), e.g., flash storage units, and a controller coupled to the IO component and the SSD. The controller can cause the storage system to receive an operation request, determine various operational throughputs associated with outstanding commands of the SSD (e.g., read or write commands to be performed by the SSD), determine a time required for the SSD to process the outstanding commands based in part on the operational throughputs, and assign a timeout value to the received operation request. The timeout value may correspond to the time required for the SSD to process the outstanding commands. Any of the operational throughputs may be throttled when a die temperature of any of the SSD's LUNs exceeds an operating temperature threshold, or when an ambient temperature affecting SSD exceeds an ambient temperature threshold.
    Type: Application
    Filed: February 5, 2014
    Publication date: August 6, 2015
    Applicant: Apple Inc.
    Inventors: Christopher J. Sarcone, Manoj K. Radhakrishnan
  • Publication number: 20150193155
    Abstract: A method for data storage, includes holding a definition of a speculative readout mode for readout in a storage device, in which the storage device is requested to read a data unit having a data unit size, and in response the storage device retrieves a storage page that contains the data unit and has a storage page size larger than the data unit size, and retains the storage page in preparation for subsequent requests. Activation of the speculative readout mode is coordinated. A readout command using the speculative readout mode is performed.
    Type: Application
    Filed: January 7, 2014
    Publication date: July 9, 2015
    Applicant: Apple Inc.
    Inventors: Christopher J. Sarcone, Shai Ojalvo
  • Patent number: 9015557
    Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: April 21, 2015
    Assignee: Apple Inc.
    Inventors: Christopher J. Sarcone, David G. Conroy, Jim Keller
  • Patent number: 8966130
    Abstract: The disclosed embodiments provide a system that facilitates the processing of commands in a set of devices. The system includes a host bus adapter that provides an interface for connecting the set of devices to the host and manages the allocation of a set of tags to one or more of the devices. For each device connected to the host, the system also includes a queue-management apparatus that sends a tag request for the device to the host bus adapter. The queue-management apparatus then receives a subset of the tags for the device from the host bus adapter and uses the set of tags to queue commands from the host to the device and track the status of the queued commands.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: February 24, 2015
    Inventors: Christopher J. Sarcone, Sergio J. Henriques
  • Publication number: 20150052404
    Abstract: The disclosed embodiments provide a system that operates a processor in a computer system. During operation, the system uses the processor to maintain a count of outstanding input/output (I/O) requests for a component in the computer system. Next, the system facilitates efficient execution of the processor by overriding a latency tolerance reporting (LTR) value for the component based on the count.
    Type: Application
    Filed: August 13, 2013
    Publication date: February 19, 2015
    Applicant: APPLE INC.
    Inventors: Sergio J. Henriques, Manoj K. Radhakrishnan, Christopher J. Sarcone
  • Publication number: 20140181326
    Abstract: The disclosed embodiments provide a system that facilitates the processing of commands in a set of devices. The system includes a host bus adapter that provides an interface for connecting the set of devices to the host and manages the allocation of a set of tags to one or more of the devices. For each device connected to the host, the system also includes a queue-management apparatus that sends a tag request for the device to the host bus adapter. The queue-management apparatus then receives a subset of the tags for the device from the host bus adapter and uses the set of tags to queue commands from the host to the device and track the status of the queued commands.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 26, 2014
    Applicant: Apple Inc.
    Inventors: Christopher J. SARCONE, Sergio J. HENRIQUES
  • Patent number: 8661163
    Abstract: The disclosed embodiments provide a system that facilitates the processing of commands in a set of devices. The system includes a host bus adapter that provides an interface for connecting the set of devices to the host and manages the allocation of a set of tags to one or more of the devices. For each device connected to the host, the system also includes a queue-management apparatus that sends a tag request for the device to the host bus adapter. The queue-management apparatus then receives a subset of the tags for the device from the host bus adapter and uses the set of tags to queue commands from the host to the device and track the status of the queued commands.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: February 25, 2014
    Assignee: Apple Inc.
    Inventors: Christopher J. Sarcone, Sergio J. Henriques
  • Patent number: 8656251
    Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: February 18, 2014
    Assignee: Apple Inc.
    Inventors: Christopher J. Sarcone, David G. Conroy, Jim Keller
  • Publication number: 20130227301
    Abstract: The disclosed embodiments provide a system that secures data transfer between a storage device and a host. During operation, the system obtains an input/output (I/O) command and an encryption context associated with the I/O command from a device driver executing on the host. Next, the system uses a storage controller bus interface between the host and the storage device to apply the encryption context to data associated with the I/O command, wherein the encryption context enables transmission of an encrypted form of the data between the storage device and the host. Finally, the system uses the storage controller bus interface to issue the I/O command to the storage device, wherein the I/O command is processed by the storage device.
    Type: Application
    Filed: February 29, 2012
    Publication date: August 29, 2013
    Applicant: APPLE INC.
    Inventor: Christopher J. Sarcone