Abstract: Methods of bit manipulation within a computer processor are disclosed. Improved flexibility in bit manipulation proves helpful in computing elementary functions critical to the performance of many programs and for other applications. In one embodiment, a unit of input data is shifted/rotated and multiple non-contiguous bit fields from the unit of input data are inserted in an output register. In another embodiment, one of two units of input data is optionally shifted or rotated, the two units of input data are partitioned into a plurality of bit fields, bitwise operations are performed on each bit field, and pairs of bit fields are combined with either an AND or an OR bitwise operation. Embodiments are also disclosed to simultaneously perform these processes on multiple units and pairs of units of input data in a Single Input, Multiple Data processing environment capable of performing logical operations on floating point data.

Abstract: A set of instructions for implementation in a floating-point unit or other computer processor hardware is disclosed herein. In one embodiment, an extended-range fused multiply-add operation, a first look-up operation, and a second look-up operation are each embodied in hardware instructions configured to be operably executed in a processor. These operations are accompanied by a table which provides a set of defined values in response to various function types, supporting the computation of elementary functions such as reciprocal, square, cube, fourth roots and their reciprocals, exponential, and logarithmic functions. By allowing each of these functions to be computed with a hardware instruction, branching and predicated execution may be reduced or eliminated, while also permitting the use of distributed instructions across a number of execution units.

Abstract: Methods of bit manipulation within a computer processor are disclosed. Improved flexibility in bit manipulation proves helpful in computing elementary functions critical to the performance of many programs and for other applications. In one embodiment, a unit of input data is shifted/rotated and multiple non-contiguous bit fields from the unit of input data are inserted in an output register. In another embodiment, one of two units of input data is optionally shifted or rotated, the two units of input data are partitioned into a plurality of bit fields, bitwise operations are performed on each bit field, and pairs of bit fields are combined with either an AND or an OR bitwise operation. Embodiments are also disclosed to simultaneously perform these processes on multiple units and pairs of units of input data in a Single Input, Multiple Data processing environment capable of performing logical operations on floating point data.

Abstract: Enabling application instructions to access mathematical functions from an accelerated function library to perform instructions. In the performance of the instructions, applying a predefined test instruction on a value, the value being at least one of an input argument, an intermediate result or a final result to determine if the value is a general-case or a predetermined special-case. Responsive to a determination that the value is a special-case, performing a predetermined set of special-case instructions for the performance of the mathematical function.

Abstract: A set of instructions for implementation in a floating-point unit or other computer processor hardware is disclosed herein. In one embodiment, an extended-range fused multiply-add operation, a first look-up operation, and a second look-up operation are each embodied in hardware instructions configured to be operably executed in a processor. These operations are accompanied by a table which provides a set of defined values in response to various function types, supporting the computation of elementary functions such as reciprocal, square, cube, fourth roots and their reciprocals, exponential, and logarithmic functions. By allowing each of these functions to be computed with a hardware instruction, branching and predicated execution may be reduced or eliminated, while also permitting the use of distributed instructions across a number of execution units.

Abstract: A dose of a contrast agent (44) is administered to the patient (42). A magnetic resonance is excited by an RF pulse (200) in a region of interest of the patient (42). An echo-planar imaging (EPI) readout waveform is implemented a preselected duration after the excitation to generate T2 or T2* weighted data. During the preselected duration, another echo planar readout waveform is implemented to generate T1 or proton density weighted data. The data is reconstructed (56) to generate a T2 or T2* weighted image and a T1 weighted image. The T1 and T2 or T2* weighted images are combined (62) to generate a contrast enhanced image.

Abstract: To generate a magnetic resonance angiograph, a patient is injected with a contrast-enhancing agent (210). An ellipsoidal central portion of k-space (300) and a first surrounding region (310) are continuously sampled (220). A portion of each central data set (300, 310) is reconstructed (230) into a low-resolution volume and maximum-intensity-projected (240) onto a line. The maximum intensity projection (240) is processed (250) in order to detect the arrival of the contrast enhancing bolus within a volume of interest. Upon detection of the arrival of the bolus, the acquisition of a high-resolution magnetic resonance angiograph is triggered (260) in which higher phase encode portions (310, 420) of k-space are sampled. The central data set (300) along with the higher phase encode views (310, 420) are reconstructed (290) into a high-resolution magnetic resonance angiogram.

Abstract: A subject is disposed in an imaging region (10) of a magnetic resonance imaging apparatus. An operator submits a series of user preferences to the apparatus. A gradient optimizer (82) generates a gradient waveform that is optimal for the imaging procedure based on the user submitted specifications and the apparatus hardware specifications. The optimizer (82) accesses a memory that stores ideal gradient waveform models. The model that best fits the user specifications is selected and digitized (84). The digitized waveform is then convolved (86) with a band-limited kernel (88) that represents a frequency spectrum (89) of a gradient amplifier (28), producing a gradient waveform (90) that is smooth and does not exceed the capabilities of the amplifier. This optimized waveform is used in an imaging process including a collected data reconstruction portion of the process.

Abstract: A subject is disposed in an imaging region (10) of a magnetic resonance imaging apparatus. An operator designates a steady-state imaging sequence and a sequence controller (42) coordinates a gradient field controller (30) and an RF pulse controller (38) to generate the desired sequence. The gradient controller applies gradients that define a closed trajectory through k-space that starts at an origin point and follows a closed path to an end point. An analyzer (112) analyzes data sampled at the beginning and end points. A gradient offset processor (114) signals the sequence controller to apply additional gradients until the analyzer determines that the end point coincides with the origin point. A scaling circuit (84) scales data sampled between the origin and end points for various anomalies in the steady-state magnetization, reconstructing scaled data into at least one image representation.

Abstract: A three-dimensional fast spin echo (FSE) scan is performed by stepping (220) through a plurality of phase encode k-space views from a computed view list (210). The view list is computed such that (i) magnetic resonance echoes having a selected image contrast are encoded in the center of k-space, (ii) adjacent data lines in k-space have similar contrast, and (iii) common planes of data lines in k-space are completed at regular intervals. As each data line is read, it is Fourier transformed (230) and stored (240) within a fast-access memory (52). Once a plane of data lines is acquired, it is Fourier transformed (250) along a second direction using a plurality of parallel processors (54). The twice-transformed data is stored (260) in conventional memory (56). Once all of the phase encode views on the view list are acquired, a final Fourier transform (60) along a third direction is performed (270), rendering a volumetric image representation.

Abstract: A non-rectangular central kernel (200, 400, 500) of magnetic resonance image data is collected and stored in an acquired data memory (44). A non-rectangular peripheral portion (210, 410, 510) of magnetic resonance image data adjacent the central kernel (200) is collected and stored in the acquired data memory (44). A phase correction data value set (54) is generated from at least a portion of the central and peripheral data value sets. A synthetic conjugately symmetric data set (220, 420, 520) is generated (60) from the peripheral data set and phase corrected (60) using the phase correction data value set (54). Unsampled corners of k-space are zero filled. The central, peripheral, and conjugately symmetric data sets are combined (80) to form a combined data set. The combined data'set is Fourier transformed (82) to form an intermediate image representation (84), which may be exported for display (90) or used for a further iteration.