Patents by Inventor Christopher L. Chua

Christopher L. Chua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10026579
    Abstract: A transient electronic device includes electronic elements (e.g., an SOI- or chip-based IC) and a trigger mechanism disposed on a frangible glass substrate. The trigger mechanism includes a switch that initiates a large trigger current through a self-limiting resistive element in response to a received trigger signal. The self-limiting resistive element includes a resistor portion that generates heat in response to the trigger current, thereby rapidly increasing the temperature of a localized (small) region of the frangible glass substrate, and a current limiting portion (e.g., a fuse) that self-limits (terminates) the trigger current after a predetermined amount of time, causing the localized region to rapidly cool down.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: July 17, 2018
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Gregory Whiting, Scott J. Limb, Christopher L. Chua, Sean Garner, Sylvia J. Smullin, Qian Wang, Rene A. Lujan
  • Patent number: 10008629
    Abstract: Light emitting devices having an enhanced degree of polarization, PD, and methods for fabricating such devices are described. A light emitting device may include a light emitting region that is configured to emit light having a central wavelength, ?, and a degree of polarization, PD, where PD>0.006??b for 200 nm???400 nm, wherein b?1.5.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: June 26, 2018
    Assignee: Palo Alto Research Center Incorporated
    Inventors: John E. Northrup, Christopher L. Chua, Michael A. Kneissl, Thomas Wunderer, Noble M. Johnson
  • Publication number: 20180158990
    Abstract: A light emitting diode includes an active region configured to emit light, a composite electrical contact layer, and a transparent electron blocking hole transport layer (TEBHTL). The composite electrical contact layer includes tow materials. At least one of the two materials is a metal configured to reflect a portion of the emitted light. The TEBHTL is arranged between the composite electrical contact layer and the active region. The TEBHTL has a thickness that extends at least a majority of a distance between the active region and the composite electrical contact layer. The TEBHTL has a band-gap greater than a band-gap of light emitting portions of the active region. The band-gap of the TEBHTL decreases as a function of distance from the active region to the composite electrical contact layer over a majority of the thickness of the TEBHTL.
    Type: Application
    Filed: January 29, 2018
    Publication date: June 7, 2018
    Inventors: John E. Northrup, Christopher L. Chua
  • Publication number: 20180114761
    Abstract: A self-destructing device includes a frangible substrate having at least one pre-weakened area. A heater is thermally coupled to the frangible substrate proximate to or at the pre-weakened area. When activated, the heater generates heat sufficient to initiate self-destruction of the frangible substrate by fractures that propagate from the pre-weakened area and cause the frangible substrate to break into many pieces.
    Type: Application
    Filed: October 20, 2016
    Publication date: April 26, 2018
    Inventors: Christopher L. Chua, Norine Chang, Gregory Whiting
  • Patent number: 9955575
    Abstract: A three dimensional device comprises a substrate and a film comprising one or more stress engineered layers. The film includes elastic portions that are curled out of plane with respect to the substrate and anchor portions that attach the elastic portions and to the substrate. An outer conductive layer is disposed over the elastic portions and the anchor portions. The device includes one or more electrically conductive stubs that extend between two adjacent anchor portions without electrically connecting the two adjacent anchor portions.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: April 24, 2018
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Yu Wang, Christopher L. Chua, Qian Wang
  • Patent number: 9912121
    Abstract: A device includes one or more reflector components. Each reflector component comprises layer pairs of epitaxially grown reflective layers and layers of a non-epitaxial material, such as air. Vias extend through at least some of the layers of the reflector components. The device may include a light emitting layer.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: March 6, 2018
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Thomas Wunderer, Christopher L. Chua, Brent S. Krusor, Noble M. Johnson
  • Publication number: 20180033577
    Abstract: A transient electronic device includes electronic elements (e.g., an SOI- or chip-based IC) and a trigger mechanism disposed on a frangible glass substrate. The trigger mechanism includes a switch that initiates a large trigger current through a self-limiting resistive element in response to a received trigger signal. The self-limiting resistive element includes a resistor portion that generates heat in response to the trigger current, thereby rapidly increasing the temperature of a localized (small) region of the frangible glass substrate, and a current limiting portion (e.g., a fuse) that self-limits (terminates) the trigger current after a predetermined amount of time, causing the localized region to rapidly cool down.
    Type: Application
    Filed: July 26, 2016
    Publication date: February 1, 2018
    Inventors: Gregory Whiting, Scott J. Limb, Christopher L. Chua, Sean Garner, Sylvia J. Smullin, Qian Wang, Rene A. Lujan
  • Publication number: 20180033742
    Abstract: A self-destructing device includes a stressed substrate with a heater thermally coupled to the stressed substrate. The device includes a power source and trigger circuitry comprising a sensor and a switch. The sensor generates a trigger signal when exposed to a trigger stimulus. The switch couples the power source to the heater in response to the trigger signal When energized by the power source, the heater generates heat sufficient to initiate self-destruction of the stressed substrate.
    Type: Application
    Filed: July 26, 2016
    Publication date: February 1, 2018
    Inventors: Christopher L. Chua, Jeng Ping Lu, Gregory Whiting, Scott J. Limb, Rene A. Lujan, Qian Wang
  • Patent number: 9882089
    Abstract: A light emitting diode includes an active region configured to emit light, a composite electrical contact layer, and a transparent electron blocking hole transport layer (TEBHTL). The composite electrical contact layer includes tow materials. At least one of the two materials is a metal configured to reflect a portion of the emitted light. The TEBHTL is arranged between the composite electrical contact layer and the active region. The TEBHTL has a thickness that extends at least a majority of a distance between the active region and the composite electrical contact layer. The TEBHTL has a band-gap greater than a band-gap of light emitting portions of the active region. The band-gap of the TEBHTL decreases as a function of distance from the active region to the composite electrical contact layer over a majority of the thickness of the TEBHTL.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: January 30, 2018
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: John E. Northrup, Christopher L. Chua
  • Patent number: 9859468
    Abstract: Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: January 2, 2018
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Wunderer, Christopher L. Chua, Noble M. Johnson
  • Publication number: 20170234964
    Abstract: A computer-implemented system and method for object tracking via identifier-tracker pairings is provided. An identifier with data for a tracker is received. The tracker is paired with the identifier and also associated with an object. The tracker is identified based on the received identifier. A location of the tracker is determined by obtaining readings regarding the tracker on a periodic or continuous basis and calculating the tracker location from the last obtained readings or by requesting readings regarding the tracker upon receipt of the identifier and calculating the tracker location from the requested readings. The location of the tracker is designated as a location of the object associated with the tracker.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 17, 2017
    Inventors: Christopher L. Chua, Ashish V. Pattekar
  • Publication number: 20170200862
    Abstract: Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.
    Type: Application
    Filed: March 28, 2017
    Publication date: July 13, 2017
    Inventors: Thomas Wunderer, Christopher L. Chua, Noble M. Johnson
  • Publication number: 20170162750
    Abstract: A light emitting diode includes an active region configured to emit light, a composite electrical contact layer, and a transparent electron blocking hole transport layer (TEBHTL). The composite electrical contact layer includes tow materials. At least one of the two materials is a metal configured to reflect a portion of the emitted light. The TEBHTL is arranged between the composite electrical contact layer and the active region. The TEBHTL has a thickness that extends at least a majority of a distance between the active region and the composite electrical contact layer. The TEBHTL has a band-gap greater than a band-gap of light emitting portions of the active region. The band-gap of the TEBHTL decreases as a function of distance from the active region to the composite electrical contact layer over a majority of the thickness of the TEBHTL.
    Type: Application
    Filed: August 11, 2016
    Publication date: June 8, 2017
    Inventors: John E. Northrup, Christopher L. Chua
  • Patent number: 9640732
    Abstract: Diode includes light emitting region, first metal layer, dielectric layer, and second metal layer. Light emitting diode includes n-type group III-nitride portion, p-type group III-nitride layer, and light emitting region sandwiched between n- and p-type layers. First metal layer may be coupled to p-type III-N portion and plurality of first terminals. First metal layer and p-type III-N portion may have substantially similar lateral size that is smaller than 200 micrometers. A portion of light emitting region and first metal layer may include a single via. Electrically-insulating layer may be coupled to first metal layer and sides of the single via. First terminals may be exposed from electrically-insulating layer. Second metal layer may include second terminal and may be coupled to electrically-insulating layer and to n-type III-N portion through the single via. The thickness of the diode excluding second terminal may be between 2 and 20 micrometers. Other embodiments are described.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: May 2, 2017
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Wunderer, Christopher L. Chua, Noble M. Johnson
  • Patent number: 9638787
    Abstract: A computer-implemented system and method for tracking objects via identifier-tracker pairings is provided. Pairs of associated identifiers and trackers are stored. One of the identifier-tracker pairs is provided to a user, wherein the user associates the tracker with a physical object. The identifier from the provided pair is received and the tracker associated with the received identifier is obtained. A location of the tracker is determined. Readers are monitored within a defined area. A plurality of readings including the tracker is obtained from the readers. A location of the identified tracker is determined based on the readings from a plurality of the readers and a location of the physical object is determined based on the location of the identified tracker.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: May 2, 2017
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Christopher L. Chua, Ashish V. Pattekar
  • Patent number: 9630424
    Abstract: A single-pass imaging system utilizes a two-dimensional (2D) light field generator (e.g., one or more VCSEL devices) to generate a modulated two-dimensional modulated light field in accordance with image data for a single row of pixels, and an anamorphic optical system that concentrates the two-dimensional modulated light field in a process direction such that a one-dimensional scan line image extending in a cross-process direction is generated on an imaging surface. The VCSEL array is configured using a scan line image data group made up of pixel image data portions, with associated groups of light emitting elements aligned in the process direction being configured by each pixel image data portion. Gray scaling is achieved either by turning on some of the light emitting elements of the associated group, or by turning the light emitting elements of the associated group partially on, e.g. using a common drive current.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: April 25, 2017
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Timothy David Stowe, David K. Biegelsen, Patrick Y. Maeda, Christopher L. Chua
  • Patent number: 9600208
    Abstract: A passive detector includes a sensor configured to sense an environmental parameter and to generate an output signal at an output of the sensor in response to the sensed environmental parameter. An energy scavenging circuit is coupled to the sensor, the energy scavenging circuit configured to convert a first voltage, V1, across the sensor to a second voltage, V2, where V2>V1. A discriminator is powered by the second voltage and is coupled to the output of the sensor. A nonvolatile memory is coupled to an output of the discriminator. The discriminator is configured to compare the sensor output signal to a threshold and, in response to the sensor output signal being above the threshold, to provide a programming signal at the output of the discriminator. The programming signal is configured to cause data to be stored or erased in the nonvolatile memory.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: March 21, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: JengPing Lu, Christopher L. Chua, Alan G. Bell
  • Patent number: 9577047
    Abstract: An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a bonding surface and the heterostructure epitaxial layers have a surface with the epitaxial growth direction of the heterostructure epitaxial layers towards the surface. The surface of the heterostructure epitaxial layers is bonded at the bonding surface of the support substrate by ion exchange between the surface of the heterostructure epitaxial layers and the bonding surface of the support substrate.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: February 21, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christopher L. Chua, Qian Wang, Brent S. Krusor, JengPing Lu, Scott J. Limb
  • Publication number: 20170012101
    Abstract: An article includes a support substrate bonded to heterostructure epitaxial layers that include one or more electronic devices. The support substrate has a bonding surface and the heterostructure epitaxial layers have a surface with the epitaxial growth direction of the heterostructure epitaxial layers towards the surface. The surface of the heterostructure epitaxial layers is bonded at the bonding surface of the support substrate by ion exchange between the surface of the heterostructure epitaxial layers and the bonding surface of the support substrate.
    Type: Application
    Filed: July 10, 2015
    Publication date: January 12, 2017
    Inventors: Christopher L. Chua, Qian Wang, Brent S. Krusor, JengPing Lu, Scott J. Limb
  • Publication number: 20160336481
    Abstract: A light emitting device includes a p-side heterostructure having a short period superlattice (SPSL) formed of alternating layers of AlxhighGa1-xhighN doped with a p-type dopant and AlxlowGa1-xlowN doped with the p-type dopant, where xlow?xhigh?0.9. Each layer of the SPSL has a thickness of less than or equal to about six bi-layers of AlGaN.
    Type: Application
    Filed: July 13, 2016
    Publication date: November 17, 2016
    Inventors: John E. Northrup, Bowen Cheng, Christopher L. Chua, Thomas Wunderer, Noble M. Johnson, Zhihong Yang