Abstract: A method, system and apparatus for fault protection using a linear feedback shift register are presented. The system comprises a protected register containing a first portion for holding a value for a sequence of numbers and a second portion for other parameters. The system also comprises a linear feedback shift register circuit configured to write the sequence of numbers to the first portion of the protected register. If the written sequence of numbers of the protected register matches a reference sequence of numbers, a rewrite circuit is configured to write the second portion of the protected register.

Abstract: A method, system and apparatus for fault protection using a linear feedback shift register are presented. The system comprises a protected register containing a first portion for holding a value for a sequence of numbers and a second portion for other parameters. The system also comprises a linear feedback shift register circuit configured to write the sequence of numbers to the first portion of the protected register. If the written sequence of numbers of the protected register matches a reference sequence of numbers, a rewrite circuit is configured to write the second portion of the protected register.

Abstract: In one embodiment, a phase detector is provided comprising a first input, a second input, and first circuitry in communication with the first and second inputs, the first circuitry operative to provide an indication of a phase difference between a first signal supplied by the first input and a second signal supplied by the second input, wherein an aberration in one of the first and second signals results in an incorrect indication of phase difference. The phase detector also comprises second circuitry in communication with the first circuitry, the second circuitry operative to provide a correct indication of phase difference despite the aberration in the at least one of the first and second signals. In another embodiment, a differential phase detector is provided.

Abstract: In one embodiment, a phase detector is provided comprising a first input, a second input, and first circuitry in communication with the first and second inputs, the first circuitry operative to provide an indication of a phase difference between a first signal supplied by the first input and a second signal supplied by the second input, wherein an aberration in one of the first and second signals results in an incorrect indication of phase difference. The phase detector also comprises second circuitry in communication with the first circuitry, the second circuitry operative to provide a correct indication of phase difference despite the aberration in the at least one of the first and second signals. In another embodiment, a differential phase detector is provided.

Abstract: In a disk drive controller, a head position servo compensates for repetitive runout disturbances arising from displacement of the center of the concentric data storage tracks from the axis of rotation of the disk. An estimator model is provided which includes first and second runout parameters for emulating the sinusoidal runout disturbance at a period that is the same as the rotational period of the disk. The runout parameter values generated from the model are stored in a reference table and used during read/write operations to adjust compensator-generated command signals in order to compensate for repetitive runout. Alternatively, an estimator including the runout parameters is operated in real time to provide estimated state signals as feedback signals for the servo system.