Abstract: A programmable interface circuit includes channel(s) including a digital logic block having terminals for receiving control signals from a process controller block, for providing logic signals, and terminals for receiving processed signal data. An analog logic block includes a current output digital to analog converter (DAC). An output circuit block includes first and second field terminals (S1,S2) and a sense resistor, wherein current from the DAC is coupled to S1 and the sense resistor is coupled to S2. The analog logic block includes a first and a second multi-channel multiplexer (MUX), an operational amplifier, and an analog to digital converter (ADC). The control signals automatically select from signal modes including an analog output (AO) mode, a digital output (DO) mode, an analog input (AI) mode, a digital input (DI) mode, and at least one additional signal mode provided by adding a sub-mode to the AI mode or DI mode.

Abstract: A double master mask process for fabricating semiconductor integrated circuits is provided in which selectively etchable dielectric layers and ion implanted resistors are used to form dense integrated circuits with a minimum number of critical alignments. A first silicon dioxide silicon nitride layer used in conjunction with a first master photomask defines a base region and an isolation region which are self-aligned with respect to each other and with respect to resistor contact regions. After isolation and base diffusion, the first oxide/nitride layer is stripped away and a second oxide/nitride layer is grown. Using a photoresist mask, a predeposition layer for the resistor is then formed using ion implantation through the oxide/nitride layers. A second master photomask allows the formation of collector and emitter regions and base and resistor contact which are self-aligned with respect to each other.