Patents by Inventor Christopher Lane

Christopher Lane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7822633
    Abstract: A method and system for evaluating a public sector organization includes identifying at least one outcome measure and at least one cost-effectiveness measure for a public sector organization; obtaining measurements associated with the measure; and determining a relative public performance measure of the public sector organization based on the measurements.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: October 26, 2010
    Assignee: Accenture Global Services Limited
    Inventors: Lisa H. Neuberger, Timothy P. Rogers, Greg Wilkinson, Greg Beales, Jonathan Garbutt, Nicholas Martin Stevens, George F. Chaplin, Fiona Sharples, Sajaad Jetha, Nicholas Marren, Thomas P. Leary, Mark Younger, Emma Jones, Christopher Lane
  • Publication number: 20100228680
    Abstract: A method and system for evaluating a public sector organization includes identifying at least one outcome measure and at least one cost-effectiveness measure for a public sector organization; obtaining measurements associated with the measure; and determining a relative public performance measure of the public sector organization based on the measurements.
    Type: Application
    Filed: August 7, 2009
    Publication date: September 9, 2010
    Applicant: ACCENTURE GLOBAL SERVICES GMBH
    Inventors: LISA H. NEUBERGER, TIMOTHY P. ROGERS, GREG WILKINSON, GREG BEALES, JONATHAN GARBUTT, NICHOLAS MARTIN STEVENS, GEORGE F. CHAPLIN, FIONA SHARPLES, SAJAAD JETHA, NICHOLAS MARREN, THOMAS P. LEARY, MARK YOUNGER, EMMA JONES, CHRISTOPHER LANE
  • Publication number: 20100220004
    Abstract: A combined GNSS and FM receiver receives FM signals comprising satellite navigation data from an AGNSS server. Associated navigation information such as a position fix is determined based on the received satellite navigation data. The received satellite navigation data are GNSS assistance data or LTO data. The AGNSS server generates the satellite navigation data by acquiring GNSS data from a satellite reference network. The acquired GNSS data comprise, for example, GPS data, GLONASS data and/or GALILEO data. The generated satellite navigation data are broadcasted as FM signals through RDS and/or RBDS to the combined GNSS and FM receiver. The combined GNSS and FM receiver receives updated satellite navigation data in subsequent FM signals, periodically or aperiodically, and updates associated navigation information, accordingly. The combined GNSS and FM receiver decodes the received FM radio signals for the updated satellite navigation data generated at the AGNSS server before being transmitted.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 2, 2010
    Inventors: Steven Malkos, Christopher Lane
  • Publication number: 20100095234
    Abstract: A method of multi-touch portable electronic device simulation using a non-touchscreen computer input device. The method includes entering a multi-touch simulation mode; recording a first touch motion and a second touch motion using the non-touchscreen computer input device; rendering the recorded first touch motion and second touch motion as a simulated simultaneous multi-touch motion; and generating a sub-routine associated with the simulated simultaneous multi-touch motion.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 15, 2010
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: Christopher LANE, Aimee Amanda LANE
  • Publication number: 20100052206
    Abstract: A twin-screw extruder includes a barrel including a pair of chambers in communication with each other and a discharge port, and an extrusion molding die coupled with respect to the discharge port of the barrel. First and second screw sets are rotatably mounted at least partially within respective ones of the pair of chambers. The first and second screw sets each include a raker blade segment at the discharge port of the barrel that includes at least one flight element with a plurality of serrations extending therethrough. Each of the first and second screw sets also include a lobed kneading segment at the discharge port of the barrel that includes at least one flight element. One of the raker blade segment and the lobed kneading segment is located downstream from another of the raker blade segment and lobed kneading segment. A method of using the twin-screw extruder is also provided.
    Type: Application
    Filed: August 27, 2009
    Publication date: March 4, 2010
    Inventors: Christopher Lane Kerr, Christopher John Malarkey, Pascale Oram, Watson Lewis Robbins, Kenneth Charles Sariego, David Robertson Treacy, JR.
  • Publication number: 20100039315
    Abstract: A GNSS enabled mobile device transmits to a location server a combination of GNSS-based location data and non-GNSS based location data used to determining reference positions at the location server. The GNSS mobile device receives the determined reference positions from the location server to calculate an associated GNSS position fix. The transmitted GNSS-based location data comprises GNSS position fixes associated with the GNSS enabled mobile device. The transmitted non-GNSS-based location data comprises a serving Cell-ID, neighbor Cell-IDs, neighbor cell fingerprinting, timing advance parameters, and/or a mobile country code. Reference positions associated with the serving Cell-ID are determined and/or refined based on location information acquired from each of associated mobile devices.
    Type: Application
    Filed: February 27, 2009
    Publication date: February 18, 2010
    Applicant: BROADCOM CORPORATION
    Inventors: Steven Malkos, Andrei Kosolobov, David Albert Lundgren, Manuel del Castillo, Christopher Lane, Alexander Michael Usach
  • Patent number: 7639042
    Abstract: Reduced voltage swing signal path circuitry is provided that lowers the internal signaling power consumption of the interconnection resources of a programmable logic device. The reduced voltage swing signal path circuitry includes a reversed routing driver circuitry to limit the voltage range of the output signal of the driver circuitry.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: December 29, 2009
    Assignee: Altera Corporation
    Inventors: Christopher Lane, Vikram Santurkar
  • Patent number: 7574373
    Abstract: A method and system for evaluating a public sector organization includes identifying at least one outcome measure and at least one cost-effectiveness measure for a public sector organization; obtaining measurements associated with the measure; and determining a relative public performance measure of the public sector organization based on the measurements.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: August 11, 2009
    Assignee: Accenture Global Services GmbH
    Inventors: Lisa H. Neuberger, Timothy P. Rogers, Greg Wilkinson, Greg Beales, Jonathan Garbutt, Nicholas Martin Stevens, George F. Chaplin, Fiona Sharples, Sajaad Jetha, Nicholas Marren, Thomas P. Leary, Mark Younger, Emma Jones, Christopher Lane
  • Publication number: 20090146688
    Abstract: Reduced voltage swing signal path circuitry is provided that lowers the internal signaling power consumption of the interconnection resources of a programmable logic device. The reduced voltage swing signal path circuitry includes a reversed routing driver circuitry to limit the voltage range of the output signal of the driver circuitry.
    Type: Application
    Filed: July 25, 2007
    Publication date: June 11, 2009
    Applicant: Altera Corporation
    Inventors: Christopher Lane, Vikram Santurkar
  • Publication number: 20080263490
    Abstract: A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is powered by a first supply voltage. The second circuit is powered by a second supply voltage. At least one of the first and second supply voltages is determined by a PLD computer-aided design (CAD) flow used to implement the user's design in the PLD.
    Type: Application
    Filed: July 1, 2008
    Publication date: October 23, 2008
    Inventors: David Lewis, Vaughn Betz, Paul Leventis, Christopher Lane, Andy Lee, Jeffrey Watt, Timothy Vanderhoek
  • Patent number: 7400167
    Abstract: A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is powered by a first supply voltage. The second circuit is powered by a second supply voltage. At least one of the first and second supply voltages is determined by a PLD computer-aided design (CAD) flow used to implement the user's design in the PLD.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: July 15, 2008
    Assignee: Altera Corporation
    Inventors: David Lewis, Vaughn Betz, Paul Leventis, Christopher Lane, Andy Lee, Jeffrey Watt, Timothy Vanderhoek
  • Publication number: 20080085477
    Abstract: A method of a single wafer wet/dry cleaning apparatus comprising: a transfer chamber having a wafer handler contained therein; a first single wafer wet cleaning chamber directly coupled to the transfer chamber; and a first single wafer ashing chamber directly coupled to the transfer chamber.
    Type: Application
    Filed: October 26, 2007
    Publication date: April 10, 2008
    Inventors: Steven Verhaverbeke, J. Truman, Christopher Lane, Sasson Somekh
  • Publication number: 20070252617
    Abstract: An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block such as a lookup table (“LUT”) and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB.
    Type: Application
    Filed: May 2, 2007
    Publication date: November 1, 2007
    Inventors: David Lewis, Paul Leventis, Andy Lee, Henry Kim, Bruce Pedersen, Chris Wysocki, Christopher Lane, ALexander Marquardt, Vikram Santurkar, Vaughn Betz
  • Publication number: 20070200596
    Abstract: A programmable logic device (PLD) includes at least two regions. Each region includes electrical circuitry that has a set of transistors. Each of the two regions has a corresponding fixed transistor threshold voltage, a corresponding fixed transistor body bias, and a corresponding fixed supply voltage.
    Type: Application
    Filed: February 24, 2006
    Publication date: August 30, 2007
    Inventors: Andy Lee, Christopher Lane, Ketan Zaveri, Richard Cliff, Cameron McClintock, Srinivas Reddy, David Lewis
  • Patent number: 7262634
    Abstract: Reduced voltage swing signal path circuitry is provided that lowers the internal signaling power consumption of the interconnection resources of a programmable logic device. The reduced voltage swing signal path circuitry includes a reversed routing driver circuitry to limit the voltage range of the output signal of the driver circuitry.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: August 28, 2007
    Assignee: Altera Corporation
    Inventors: Christopher Lane, Vikram Santurkar
  • Publication number: 20070093071
    Abstract: A method of a single wafer wet/dry cleaning apparatus comprising: a transfer chamber having a wafer handler contained therein; a first single wafer wet cleaning chamber directly coupled to the transfer chamber; and a first single wafer ashing chamber directly coupled to the transfer chamber.
    Type: Application
    Filed: November 27, 2006
    Publication date: April 26, 2007
    Inventors: Steven Verhaverbeke, J Truman, Christopher Lane, Sasson Somekh
  • Publication number: 20070051471
    Abstract: One embodiment of the present invention is a stripping reactor that includes: (a) a remote plasma source disposed to output a gas; (b) a gas distribution plate connected to ground that transmits the gas output from the remote plasma source to a processing chamber; (c) a wafer support disposed in the processing chamber; (d) a wafer support assembly disposed about the wafer pedestal that includes an outer conductive peripheral structure connected to ground; and (e) an RF power supply connected to supply RF power to the wafer support.
    Type: Application
    Filed: October 4, 2002
    Publication date: March 8, 2007
    Inventors: Mark Kawaguchi, Elizabeth Pavel, James Papanu, Jonathan Mohn, John Yamartino, Christopher Lane, Michael Barnes, Robert Wunar
  • Publication number: 20070040577
    Abstract: A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is powered by a first supply voltage. The second circuit is powered by a second supply voltage. At least one of the first and second supply voltages is determined by a PLD computer-aided design (CAD) flow used to implement the user's design in the PLD.
    Type: Application
    Filed: August 16, 2005
    Publication date: February 22, 2007
    Inventors: David Lewis, Vaughn Betz, Paul Leventis, Christopher Lane, Andy Lee, Jeffrey Watt, Timothy Vanderhoek
  • Publication number: 20070040576
    Abstract: A programmable logic device (PLD) includes a non-volatile memory, a configuration memory, and a control circuitry. The control circuitry couples to the non-volatile memory and to the configuration memory. A set of voltages are derived from the outputs of the control circuitry, and are applied to circuitry within the PLD.
    Type: Application
    Filed: December 22, 2005
    Publication date: February 22, 2007
    Inventors: David Lewis, Christopher Lane, Sarathy Sribhashyam, Srinivas Perisetty, Tim Vanderhoek, Vaughn Betz, Thomas Wong, Andy Lee
  • Publication number: 20060158220
    Abstract: Reduced voltage swing signal path circuitry is provided that lowers the internal signaling power consumption of the interconnection resources of a programmable logic device. The reduced voltage swing signal path circuitry includes a reversed routing driver circuitry to limit the voltage range of the output signal of the driver circuitry.
    Type: Application
    Filed: January 19, 2005
    Publication date: July 20, 2006
    Inventors: Christopher Lane, Vikram Santurkar