Patents by Inventor Christopher Larsen

Christopher Larsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200307362
    Abstract: In one aspect, a baggage door is provided for a vehicle. The baggage door includes a plastic outer panel for closing an opening of a vehicle and a hinge base configured to be mounted to a surface adjacent the opening. The baggage door further includes a plastic inner support having a hinge portion of the plastic inner support configured to pivotally connect to the hinge base. The inner support includes an arm portion extending away from the hinge portion for supporting the outer panel.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 1, 2020
    Inventors: Joseph Rozanek, Christopher Davis, Kyle Larsen, Stephen McGarry
  • Publication number: 20200305609
    Abstract: A kit of components is provided for manufacturing a plurality of furniture members. The kit may include first and second armrest frames, a mounting cradle, a remote control device, an adaptor insert, and a control panel. The first armrest frame may include a first armrest panel having a first opening formed therein. The mounting cradle may include a first housing received through the first opening and engaging the first armrest panel. The remote control device may be removably received in the mounting cradle. The second armrest frame may include a second armrest panel having a second opening formed therein. The second opening may be identical to the first opening. The adaptor insert may be partially received through the second opening and may engage the second armrest panel. The adaptor insert may include a third opening. The control panel may include a second housing received through the third opening and engaging the adaptor insert.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 1, 2020
    Applicant: La-Z-Boy Incorporated
    Inventors: Jason D. RAINS, Christopher A. LARSEN, Mark D. MCCLUNG, Jason M. BAKER
  • Publication number: 20200251347
    Abstract: A method used in forming an array of elevationally-extending strings of memory cells comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. The stack comprises an etch-stop tier between a first tier and a second tier of the stack. The etch-stop tier is of different composition from those of the insulative tiers and the wordline tiers. Etching is conducted into the insulative tiers and the wordline tiers that are above the etch-stop tier to the etch-stop tier to form channel openings that have individual bases comprising the etch-stop tier. The etch-stop tier is penetrated through to extend individual of the channel openings there-through. After extending the individual channel openings through the etch-stop tier, etching is conducted into and through the insulative tiers and the wordline tiers that are below the etch-stop tier to extend the individual channel openings deeper into the stack below the etch-stop tier.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Applicant: Micron Technology, Inc.
    Inventors: John D. Hopkins, Gordon A. Haller, Tom J. John, Anish A. Khandekar, Christopher Larsen, Kunal Shrotri
  • Patent number: 10702295
    Abstract: A device for dilating an ostium of a paranasal sinus of a human or animal subject may include: a handle; an elongate shaft having a proximal end coupled with the handle and extending to a distal end; a guidewire disposed through at least a portion of the shaft lumen; a dilator having a non-expanded configuration and an expanded configuration; and a slide member coupled with at least one of the guidewire or the dilator through the longitudinal opening of the shaft for advancing the guidewire and/or the dilator relative to the shaft.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: July 7, 2020
    Assignee: Acclarent, Inc.
    Inventors: Thomas R. Jenkins, Eric Goldfarb, Tom Thanh Vo, Joshua Makower, Robert N. Wood, Ronda M. Heiser, Christopher Larsen, Daniel T. Harfe
  • Patent number: 10684019
    Abstract: A burner assembly for a cooking hob includes a gas burner portion having a lower housing and a burner housing assembled with and supported by the lower housing. The burner housing defines a gas distribution path open at least on an outer surface of the burner housing through a plurality of outlets. A central region of the gas burner portion is defined by an opening within the burner housing and is at least partially enclosed beneath the gas burner portion by the lower housing. The burner assembly further includes a first electric heating element disposed beneath a portion of the lower housing within the central region of the gas burner portion.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: June 16, 2020
    Assignee: Whirlpool Corporation
    Inventor: Christopher A. Larsen
  • Publication number: 20200184441
    Abstract: A portable handheld device for wireless order entry and real time payment authorization may include a portable housing, a display carried by the housing, an order entry input device carried by the housing, a transaction card input device carried by the housing for reading user sensitive information from a transaction card, a wireless transceiver carried by the housing, and a processor carried by the housing and connected to the display, order entry input device, transaction card input device and wireless transceiver. The processor may be for wirelessly sending input order information, and encrypting and wirelessly sending the user sensitive information from the transaction card without storing and without displaying. The processor may also be for wirelessly receiving and displaying payment authorization information based upon real time authorization from a transaction card issuing entity.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Applicant: SECUREDPAY SOLUTIONS, INC.
    Inventors: JOHN M. JOHNSON, ROY T. NELSON, CHRISTOPHER D. FAIRCLOTH, LANCE LARSEN
  • Patent number: 10665469
    Abstract: A method used in forming an array of elevationally-extending strings of memory cells comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. The stack comprises an etch-stop tier between a first tier and a second tier of the stack. The etch-stop tier is of different composition from those of the insulative tiers and the wordline tiers. Etching is conducted into the insulative tiers and the wordline tiers that are above the etch-stop tier to the etch-stop tier to form channel openings that have individual bases comprising the etch-stop tier. The etch-stop tier is penetrated through to extend individual of the channel openings there-through. After extending the individual channel openings through the etch-stop tier, etching is conducted into and through the insulative tiers and the wordline tiers that are below the etch-stop tier to extend the individual channel openings deeper into the stack below the etch-stop tier.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: May 26, 2020
    Assignee: Micron Technology, Inc.
    Inventors: John D. Hopkins, Gordon A. Haller, Tom J. John, Anish A. Khandekar, Christopher Larsen, Kunal Shrotri
  • Patent number: 10658382
    Abstract: An elevationally-extending string of memory cells comprises an upper stack elevationally over a lower stack. The upper and lower stacks individually comprise vertically-alternating tiers comprising control gate material of individual charge storage field effect transistors vertically alternating with insulating material. An upper stack channel pillar extends through multiple of the vertically-alternating tiers in the upper stack and a lower stack channel pillar extends through multiple of the vertically-alternating tiers in the lower stack. Tunnel insulator, charge storage material, and control gate blocking insulator is laterally between the respective upper and lower stack channel pillars and the control gate material. A conductive interconnect comprising conductively-doped semiconductor material is elevationally between and electrically couples the upper and lower stack channel pillars together. The conductively-doped semiconductor material comprises a first conductivity-producing dopant.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: May 19, 2020
    Assignee: Micron Technology, Inc.
    Inventors: John D. Hopkins, David Daycock, Yushi Hu, Christopher Larsen, Dimitrios Pavlopoulos
  • Patent number: 10592881
    Abstract: A portable handheld device for wireless order entry and real time payment authorization may include a portable housing, a display carried by the housing, an order entry input device carried by the housing, a transaction card input device carried by the housing for reading user sensitive information from a transaction card, a wireless transceiver carried by the housing, and a processor carried by the housing and connected to the display, order entry input device, transaction card input device and wireless transceiver. The processor may be for wirelessly sending input order information, and encrypting and wirelessly sending the user sensitive information from the transaction card without storing and without displaying. The processor may also be for wirelessly receiving and displaying payment authorization information based upon real time authorization from a transaction card issuing entity.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: March 17, 2020
    Assignee: SECUREDPAY SOLUTIONS, INC.
    Inventors: John M. Johnson, Roy T. Nelson, Christopher D. Faircloth, Lance Larsen
  • Publication number: 20200083059
    Abstract: A method used in forming an array of elevationally-extending strings of memory cells comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. The stack comprises an etch-stop tier between a first tier and a second tier of the stack. The etch-stop tier is of different composition from those of the insulative tiers and the wordline tiers. Etching is conducted into the insulative tiers and the wordline tiers that are above the etch-stop tier to the etch-stop tier to form channel openings that have individual bases comprising the etch-stop tier. The etch-stop tier is penetrated through to extend individual of the channel openings there-through. After extending the individual channel openings through the etch-stop tier, etching is conducted into and through the insulative tiers and the wordline tiers that are below the etch-stop tier to extend the individual channel openings deeper into the stack below the etch-stop tier.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Applicant: Micron Technology, Inc.
    Inventors: John D. Hopkins, Gordon A. Haller, Tom J. John, Anish A. Khandekar, Christopher Larsen, Kunal Shrotri
  • Patent number: 10579978
    Abstract: A portable handheld device for wireless order entry and real time payment authorization may include a portable housing, a display carried by the housing, an order entry input device carried by the housing, a transaction card input device carried by the housing for reading user sensitive information from a transaction card, a wireless transceiver carried by the housing, and a processor carried by the housing and connected to the display, order entry input device, transaction card input device and wireless transceiver. The processor may be for wirelessly sending input order information, and encrypting and wirelessly sending the user sensitive information from the transaction card without storing and without displaying. The processor may also be for wirelessly receiving and displaying payment authorization information based upon real time authorization from a transaction card issuing entity.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: March 3, 2020
    Assignee: SECUREDPAY SOLUTIONS, INC.
    Inventors: John M. Johnson, Roy T. Nelson, Christopher D. Faircloth, Lance Larsen
  • Patent number: 10541252
    Abstract: Some embodiments include a memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends corresponding to control gate regions. Charge-trapping material is along the control gate regions of the wordline levels and not along the insulative levels. The charge-trapping material is spaced from the control gate regions by charge-blocking material. Channel material extends vertically along the stack and is laterally spaced from the charge-trapping material by dielectric material. Some embodiments include methods of forming NAND memory arrays.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: January 21, 2020
    Assignee: Micron Technology, Inc.
    Inventors: David Daycock, Richard J. Hill, Christopher Larsen, Woohee Kim, Justin B. Dorhout, Brett D. Lowe, John D. Hopkins, Qian Tao, Barbara L. Casey
  • Patent number: 10528916
    Abstract: Described are methods and systems for interview competency and question validation and analysis to improve the effectiveness of evaluation campaigns. In one method, processing logic of an interview design program, hosted by a digital evaluation platform, receives a request from a first device to create a digital interview for a position. The interview design program sends a list of competencies associated with the position and receives a selection of a set of desired competencies. The interview design program determines a list of questions that differentiate candidates within the desired competencies, ranks the list of questions by importance, and sends the list of questions and the ranking information to the first device and receives a selection of a set of desired questions. The interview design program creates the digital interview with the set of desired questions. The digital evaluation platform presents the digital interview to a candidate on a second device.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: January 7, 2020
    Assignee: HireVue Inc.
    Inventors: Benjamin Taylor, Daniel Bray, Loren Larsen, Christopher Luman
  • Publication number: 20190267396
    Abstract: Some embodiments include a memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends corresponding to control gate regions. Charge-trapping material is along the control gate regions of the wordline levels and not along the insulative levels. The charge-trapping material is spaced from the control gate regions by charge-blocking material. Channel material extends vertically along the stack and is laterally spaced from the charge-trapping material by dielectric material. Some embodiments include methods of forming NAND memory arrays.
    Type: Application
    Filed: May 13, 2019
    Publication date: August 29, 2019
    Applicant: Micron Technology, Inc.
    Inventors: David Daycock, Richard J. Hill, Christopher Larsen, Woohee Kim, Justin B. Dorhout, Brett D. Lowe, John D. Hopkins, Qian Tao, Barbara L. Casey
  • Publication number: 20190244972
    Abstract: An elevationally-extending string of memory cells comprises an upper stack elevationally over a lower stack. The upper and lower stacks individually comprise vertically-alternating tiers comprising control gate material of individual charge storage field effect transistors vertically alternating with insulating material. An upper stack channel pillar extends through multiple of the vertically-alternating tiers in the upper stack and a lower stack channel pillar extends through multiple of the vertically-alternating tiers in the lower stack. Tunnel insulator, charge storage material, and control gate blocking insulator is laterally between the respective upper and lower stack channel pillars and the control gate material. A conductive interconnect comprising conductively-doped semiconductor material is elevationally between and electrically couples the upper and lower stack channel pillars together. The conductively-doped semiconductor material comprises a first conductivity-producing dopant.
    Type: Application
    Filed: April 17, 2019
    Publication date: August 8, 2019
    Applicant: Micron Technology, Inc.
    Inventors: John D. Hopkins, David Daycock, Yushi Hu, Christopher Larsen, Dimitrios Pavlopoulos
  • Patent number: 10304853
    Abstract: Some embodiments include a memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends corresponding to control gate regions. Charge-trapping material is along the control gate regions of the wordline levels and not along the insulative levels. The charge-trapping material is spaced from the control gate regions by charge-blocking material. Channel material extends vertically along the stack and is laterally spaced from the charge-trapping material by dielectric material. Some embodiments include methods of forming NAND memory arrays.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: May 28, 2019
    Assignee: Micron Technology, Inc.
    Inventors: David Daycock, Richard J. Hill, Christopher Larsen, Woohee Kim, Justin B. Dorhout, Brett D. Lowe, John D. Hopkins, Qian Tao, Barbara L. Casey
  • Patent number: 10283520
    Abstract: An elevationally-extending string of memory cells comprises an upper stack elevationally over a lower stack. The upper and lower stacks individually comprise vertically-alternating tiers comprising control gate material of individual charge storage field effect transistors vertically alternating with insulating material. An upper stack channel pillar extends through multiple of the vertically-alternating tiers in the upper stack and a lower stack channel pillar extends through multiple of the vertically-alternating tiers in the lower stack. Tunnel insulator, charge storage material, and control gate blocking insulator is laterally between the respective upper and lower stack channel pillars and the control gate material. A conductive interconnect comprising conductively-doped semiconductor material is elevationally between and electrically couples the upper and lower stack channel pillars together. The conductively-doped semiconductor material comprises a first conductivity-producing dopant.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: May 7, 2019
    Assignee: Micron Technology, Inc.
    Inventors: John D. Hopkins, David Daycock, Yushi Hu, Christopher Larsen, Dimitrios Pavlopoulos
  • Publication number: 20180323212
    Abstract: Some embodiments include a memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends corresponding to control gate regions. Charge-trapping material is along the control gate regions of the wordline levels and not along the insulative levels. The charge-trapping material is spaced from the control gate regions by charge-blocking material. Channel material extends vertically along the stack and is laterally spaced from the charge-trapping material by dielectric material. Some embodiments include methods of forming NAND memory arrays.
    Type: Application
    Filed: July 10, 2018
    Publication date: November 8, 2018
    Applicant: Micron Technology, Inc.
    Inventors: David Daycock, Richard J. Hill, Christopher Larsen, Woohee Kim, Justin B. Dorhout, Brett D. Lowe, John D. Hopkins, Qian Tao, Barbara L. Casey
  • Patent number: 10083981
    Abstract: Some embodiments include a memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends corresponding to control gate regions. Charge-trapping material is along the control gate regions of the wordline levels and not along the insulative levels. The charge-trapping material is spaced from the control gate regions by charge-blocking material. Channel material extends vertically along the stack and is laterally spaced from the charge-trapping material by dielectric material. Some embodiments include methods of forming NAND memory arrays.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: September 25, 2018
    Assignee: Micron Technology, Inc.
    Inventors: David Daycock, Richard J. Hill, Christopher Larsen, Woohee Kim, Justin B. Dorhout, Brett D. Lowe, John D. Hopkins, Qian Tao, Barbara L. Casey
  • Patent number: 10074256
    Abstract: Embodiments of the disclosure include systems and methods for detection of background and foreground radiances captured by a multispectral imaging device. In some embodiments, a multispectral imaging device may generate a plurality of images of the same field of view, wherein the images may be captured at a variety of wavelengths. These images may be processed to identify any incidents, such as fire and/or gas leaks, within the field of view of the imaging device.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: September 11, 2018
    Assignee: Honeywell International Inc.
    Inventors: Kwong Wing Au, Christopher Larsen