Abstract: Described herein are optoelectronic devices and methods incorporating strain balanced direct bandgap AlxIn1-xP multiple quantum wells. The described devices are strain balanced in that the net strain between the ordered quantum wells and barriers is low, or in some cases zero. Advantageously, the described devices may be specifically designed for higher efficiency than existing AlxIn1-xP and may be grown on commercially available GaAs substrates.

Abstract: Aspects of a prefetch module for high throughput memory transfers is described. Data stored in a row buffer of a memory device can be quickly transferred over a serial link to a prefetch buffer. In one example, a number of respective serial links can be used to transfer the data stored in several row buffers of respective memory devices to the prefetch buffer. In the prefetch buffer, all the data from the memory devices is stored in a data cache. Once the data is cached at the prefetch buffer, a memory controller can access it more quickly in any suitable way. As compared to conventional approaches, the embodiments can be relied upon to avoid a significant amount of latency in memory read and write operations with memory modules.

Abstract: An envelope is disclosed for attachment to a promotional good. The envelope encapsulates a display medium. The envelope includes a transparent top layer of plastic material through which the display medium can be visible and an initially open portal through which the display medium can be inserted. The open portal can be subsequently sealed.

Abstract: An airbrush has a housing with at least two air chambers. Each chamber is sized to receive a nib of a pen. A motor is oriented in the housing. An air pump is oriented in the housing and is driven by the motor. The air pump is in fluid communication with the at least two air chambers for forcing air into each of the at least two air chambers, about each pen nib to entrain particles from the nib into the air, and out of the housing for providing a combined spray with particles from pens of the at least two air chambers.

Abstract: The present invention relates to a duster brush assembly for a vacuum cleaner. The duster brush assembly includes a duster brush fixedly disposed at the air flow entrance of a hollow tubular member operatively connected to the vacuum cleaner. A hollow tubular member is telescopically mounted on a suction tube which is in communication with the vacuum cleaner. To clean the duster brush the hollow tubular member is moved forward over the duster brush is removed by vacuum into the vacuum cleaner.

Abstract: The present invention, generally speaking, uses input buffering and output control to provide a high-speed, high-performance digital traffic switch. This approach solves all of the problems noted above with respect to the prior art (input buffering/input control, output buffering/output control). Dropped discrete information units (cells) are dropped at the input port, and so will not be transmitted across the switch fabric. This reduces the traffic load on the switch fabric during congested periods, and makes the switch fabric easier to design and expand. Input buffering/output control allows for the use of smaller buffers than output buffered/output control architectures for the same level of “discrete information unit (cell) drop” performance, and scales well to larger systems. Input buffering/output control provides all the information necessary to the output (data flow) controller necessary to implement very precise control algorithms.

Abstract: The present invention, generally speaking, uses input buffering and output control to provide a high-speed, high-performance digital traffic switch. Dropped discrete information units (cells) are dropped at the input port, and so will not be transmitted across the switch fabric. This reduces the traffic load on the switch fabric during congested periods, and makes the switch fabric easier to design and expand. Input buffering/output control allows for the use of smaller buffers than output buffered/output control architectures for the same level of "discrete information unit (cell) drop" performance, and scales well to larger systems. Input buffering/output control provides all the information necessary to the output (data flow) controller necessary to implement very precise control algorithms. These algorithms can then administer switch fabric admission polices and contract enforcement fairly across all input ports.