Patents by Inventor Christopher Neil SWINDLE

Christopher Neil SWINDLE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240022651
    Abstract: In operation, packets traverse the packet processing data structure, and the network processing represented by each object in the data structure is applied to each packet. From time to time, the packet processing data structure may need to be updated. Embodiments of the present disclosure provide for lock-free updating of a packet processing data structure by means of epoch-based garbage collection. In embodiments, a particular past packet processing epoch is considered to be no longer referenced by any cores when the sequence numbers recorded in each said memory location are different to the sequence number of that particular past packet processing epoch. The deletion thread checks both whether a past epoch is being referenced by any packets and whether it is being reference by any cores. Thus memory is safely freed without having any impact on any packet processing which may be occurring in parallel to the deletion thread.
    Type: Application
    Filed: April 14, 2023
    Publication date: January 18, 2024
    Inventors: Matthew Ian Ronald WILLIAMS, Richard John WHITEHOUSE, Christopher Neil SWINDLE, Colin REYNOLDS
  • Patent number: 11659071
    Abstract: In operation, packets traverse the packet processing data structure, and the network processing represented by each object in the data structure is applied to each packet. From time to time, the packet processing data structure may need to be updated. Embodiments of the present disclosure provide for lock-free updating of a packet processing data structure by means of epoch-based garbage collection. In embodiments, a particular past packet processing epoch is considered to be no longer referenced by any cores when the sequence numbers recorded in each said memory location are different to the sequence number of that particular past packet processing epoch. The deletion thread checks both whether a past epoch is being referenced by any packets and whether it is being reference by any cores. Thus memory is safely freed without having any impact on any packet processing which may be occurring in parallel to the deletion thread.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: May 23, 2023
    Assignee: MetaSwitch Networks Ltd.
    Inventors: Matthew Ian Ronald Williams, Richard John Whitehouse, Christopher Neil Swindle, Colin Reynolds
  • Publication number: 20220261283
    Abstract: The techniques disclosed herein improve existing systems by receiving a packet to process and determining an associated packet processing graph for the packet. In response to determining that the associated packet processing graph contains an action comprising a set of rules for modifying the packet processing graph, a table to modify in the packet processing graph is accessed based on a table identifier in the action. The accessed table is modified by inserting one or more table rows into the packet processing graph and for each inserted table row, inserting a set of template actions containing prepopulated fields. The modified table is used to process subsequent packets.
    Type: Application
    Filed: May 11, 2021
    Publication date: August 18, 2022
    Inventors: Jonathan Eric HARDWICK, Christopher Neil SWINDLE, Matthew Ian Ronald WILLIAMS, Michael Jeffrey EVANS
  • Publication number: 20220166856
    Abstract: In operation, packets traverse the packet processing data structure, and the network processing represented by each object in the data structure is applied to each packet. From time to time, the packet processing data structure may need to be updated. Embodiments of the present disclosure provide for lock-free updating of a packet processing data structure by means of epoch-based garbage collection. In embodiments, a particular past packet processing epoch is considered to be no longer referenced by any cores when the sequence numbers recorded in each said memory location are different to the sequence number of that particular past packet processing epoch. The deletion thread checks both whether a past epoch is being referenced by any packets and whether it is being reference by any cores. Thus memory is safely freed without having any impact on any packet processing which may be occurring in parallel to the deletion thread.
    Type: Application
    Filed: November 24, 2021
    Publication date: May 26, 2022
    Inventors: Matthew Ian Ronald WILLIAMS, Richard John WHITEHOUSE, Christopher Neil SWINDLE, Colin REYNOLDS
  • Patent number: 9665408
    Abstract: Certain examples are described relating to resource allocation for one or more digital signal processors in a media gateway. Processing of telecommunication calls are allocated to different digital signal processor cores in the media gateway. When more processing resources are required for a call, a determination is made as to whether any of a set of digital signal processor cores are able to provide these resources. Responsive to a particular digital signal processor core being unable to provide the further processing resources, a reallocation process is initiated. This may involve reserving resources on a further digital processor core, releasing the original set of processing resources and allocating the processing of the call to the further digital processor core.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: May 30, 2017
    Assignee: Metaswitch Networks Ltd
    Inventors: Christopher Neil Swindle, Murray William Rogers, John Patrick Batty, Mark Edward Overton, Christian Dominic Lund
  • Publication number: 20150169374
    Abstract: Certain examples are described relating to resource allocation for one or more digital signal processors in a media gateway. Processing of telecommunication calls are allocated to different digital signal processor cores in the media gateway. When more processing resources are required for a call, a determination is made as to whether any of a set of digital signal processor cores are able to provide these resources. Responsive to a particular digital signal processor core being unable to provide the further processing resources, a reallocation process is initiated. This may involve reserving resources on a further digital processor core, releasing the original set of processing resources and allocating the processing of the call to the further digital processor core.
    Type: Application
    Filed: December 11, 2014
    Publication date: June 18, 2015
    Inventors: Christopher Neil SWINDLE, Murray William ROGERS, John Patrick BATTY, Mark Edward OVERTON, Christian Dominic LUND