Abstract: Various embodiments disclosed herein provide for several methods of fabricating p-type semiconductors with industrially relevant hole mobilities that are back end of the line (BEOL) compatible. A first method of fabrication includes forming a buffer layer on a substrate, forming a palladium oxide layer over the buffer layer, annealing the palladium oxide layer, and then forming a cap layer over the palladium oxide layer, then cooling the stack, wherein each step is performed at a variety of predefined temperatures. Each of the substrate, buffer layer and cap layer can be magnesium oxide. A second method includes forming a palladium oxide layer over a titanium dioxide substrate, annealing the stack, and then cooling the stack, all performed at a different variety of predefined temperatures.