Patents by Inventor Christopher Paul Frascati
Christopher Paul Frascati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11074082Abstract: A method for camera processing using a camera application programming interface (API) is described. A processor executing the camera API may be configured to receive instructions that specify a use case for a camera pipeline, the use case defining at least one or more processing engines of a plurality of processing engines for processing image data with the camera pipeline, wherein the plurality of processing engines includes one or more of fixed-function image signal processing nodes internal to a camera processor and one or more processing engines external to the camera processor. The processor may be further configured to route image data to the one or more processing engines specified by the instructions, and return the results of processing the image data with the one or more processing engines to the application.Type: GrantFiled: March 13, 2020Date of Patent: July 27, 2021Assignee: Qualcomm IncorporatedInventors: Christopher Paul Frascati, Rajakumar Govindaram, Hitendra Mohan Gangani, Murat Balci, Lida Wang, Avinash Seetharamaiah, Mansoor Aftab, Rajdeep Ganguly, Josiah Vivona
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Publication number: 20200218541Abstract: A method for camera processing using a camera application programming interface (API) is described. A processor executing the camera API may be configured to receive instructions that specify a use case for a camera pipeline, the use case defining at least one or more processing engines of a plurality of processing engines for processing image data with the camera pipeline, wherein the plurality of processing engines includes one or more of fixed-function image signal processing nodes internal to a camera processor and one or more processing engines external to the camera processor. The processor may be further configured to route image data to the one or more processing engines specified by the instructions, and return the results of processing the image data with the one or more processing engines to the application.Type: ApplicationFiled: March 13, 2020Publication date: July 9, 2020Inventors: Christopher Paul Frascati, Rajakumar Govindaram, Hitendra Mohan Gangani, Murat Balci, Lida Wang, Avinash Seetharamaiah, Mansoor Aftab, Rajdeep Ganguly, Josiah Vivona
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Patent number: 10613870Abstract: A method for camera processing using a camera application programming interface (API) is described. A processor executing the camera API may be configured to receive instructions that specify a use case for a camera pipeline, the use case defining at least one or more processing engines of a plurality of processing engines for processing image data with the camera pipeline, wherein the plurality of processing engines includes one or more of fixed-function image signal processing nodes internal to a camera processor and one or more processing engines external to the camera processor. The processor may be further configured to route image data to the one or more processing engines specified by the instructions, and return the results of processing the image data with the one or more processing engines to the application.Type: GrantFiled: September 21, 2017Date of Patent: April 7, 2020Assignee: Qualcomm IncorporatedInventors: Christopher Paul Frascati, Rajakumar Govindaram, Hitendra Mohan Gangani, Murat Balci, Lida Wang, Avinash Seetharamaiah, Mansoor Aftab, Rajdeep Ganguly, Josiah Vivona
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Patent number: 10282813Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.Type: GrantFiled: February 13, 2018Date of Patent: May 7, 2019Assignee: QUALCOMM IncorporatedInventors: Murat Balci, Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala Gadda Nagendra Kumar, Colin Christopher Sharp, David Rigel Garcia Garcia
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Publication number: 20190087198Abstract: A method for camera processing using a camera application programming interface (API) is described. A processor executing the camera API may be configured to receive instructions that specify a use case for a camera pipeline, the use case defining at least one or more processing engines of a plurality of processing engines for processing image data with the camera pipeline, wherein the plurality of processing engines includes one or more of fixed-function image signal processing nodes internal to a camera processor and one or more processing engines external to the camera processor. The processor may be further configured to route image data to the one or more processing engines specified by the instructions, and return the results of processing the image data with the one or more processing engines to the application.Type: ApplicationFiled: September 21, 2017Publication date: March 21, 2019Inventors: Christopher Paul Frascati, Rajakumar Govindaram, Hitendra Mohan Gangani, Murat Balci, Lida Wang, Avinash Seetharamaiah, Mansoor Aftab, Rajdeep Ganguly, Josiah Vivona
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Patent number: 10078883Abstract: This disclosure is directed to graphics data storage. A graphics processing unit (GPU) may determine pixels of a tile for which the GPU generated graphics data during the rendering of the tile. The GPU may store the generated graphics data in a local memory, and use the information of the pixels of the tile for which the GPU generated graphics data to limit the amount of graphics data stored in the local memory that the GPU is to write to an external memory.Type: GrantFiled: December 3, 2015Date of Patent: September 18, 2018Assignee: QUALCOMM IncorporatedInventors: Siddhartha Baral, Avinash Seetharamaiah, Christopher Paul Frascati
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Publication number: 20180165788Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.Type: ApplicationFiled: February 13, 2018Publication date: June 14, 2018Inventors: Murat Balci, Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala Gadda Nagendra Kumar, Colin Christopher Sharp, David Rigel Garcia Garcia
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Patent number: 9928565Abstract: A device comprising a graphics processing unit (GPU) includes a memory and at least one processor. The at least one processor may be configured to: receive a GPU command packet that indicates the GPU may select between a direct rendering mode or a binning rendering mode for a portion of a frame to be rendered by the GPU, determine whether to use the direct rendering mode or the binning rendering mode for the portion of the frame to be rendered by the GPU based on at least one of: information in the received command packet or a state of the GPU, and render the portion of the frame using the determined direct rendering mode or the binning rendering mode.Type: GrantFiled: April 20, 2015Date of Patent: March 27, 2018Assignee: QUALCOMM IncorporatedInventors: Murat Balci, Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala gadda Nagendra Kumar, Colin Christopher Sharp, David Rigel Garcia Garcia
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Publication number: 20180040095Abstract: This disclosure describes techniques for compressing a graphical state object. In one example, a central processing unit may be configured to receive, for output to the GPU, a set of instructions to render a scene. Responsive to receiving the set of instructions to render the scene, the central processing unit may be further configured to determine whether the set of instructions includes a state object that is registered as corresponding to an identifier. Responsive to determining that the set of instructions includes the state object that is registered as corresponding to the identifier, the central processing unit may be further configured to output, to the GPU, the identifier that is registered as corresponding to the state object.Type: ApplicationFiled: August 2, 2016Publication date: February 8, 2018Inventors: Avinash Seetharamaiah, Christopher Paul Frascati, Jonnala Gadda Nagendra Kumar, Andrew Evan Gruber, Colin Christopher Sharp, Eric Demers
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Patent number: 9836810Abstract: The present disclosure provides systems and methods for multi-path rendering on tile based architectures including executing, with a graphics processing unit (GPU), a query pass, executing, with the GPU, a condition true pass based on the query pass without executing a flush operation, executing, with the GPU, a condition false pass based on the query pass without executing a flush operation, and responsive to executing the condition true pass and the condition false pass, executing, with the GPU, a flush operation.Type: GrantFiled: February 1, 2016Date of Patent: December 5, 2017Assignee: QUALCOMM IncorporatedInventors: Murat Balci, Christopher Paul Frascati, Avinash Seetharamaiah
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Patent number: 9799088Abstract: In an example, a method for rendering graphics data includes receiving a plurality of commands associated with a plurality of render targets, where the plurality of commands are received in an initial order. The method also includes determining an execution order for the plurality of commands including reordering one or more of the plurality of commands in a different order than the initial order based on data dependencies between commands. The method also includes executing the plurality of commands in the determined execution order.Type: GrantFiled: August 21, 2014Date of Patent: October 24, 2017Assignee: QUALCOMM IncorporatedInventors: Christopher Paul Frascati, Murat Balci, Avinash Seetharamaiah, Maurice Franklin Ribble, Hitendra Mohan Gangani
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Patent number: 9773340Abstract: A method and apparatus for ray tracing may include a method, manufacture and apparatus for ray tracing that may include dividing a render target into a plurality of bins. Next, a visibility pass is performed using ray tracing to generate a visibility stream such that the visibility stream indicates, for each bin of the plurality of bins, which primitives are visible in the bin. Then, for at least one bin of the plurality of bins, each primitive in the bin that is indicated in the visibility stream as being visible in the bin is rendered.Type: GrantFiled: June 12, 2015Date of Patent: September 26, 2017Assignee: QUALCOMM IncorporatedInventors: Murat Balci, Christopher Paul Frascati, Juraj Obert, Hitendra Mohan Gangani, Avinash Seetharamaiah
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Patent number: 9684950Abstract: An apparatus configured for graphics processing includes a memory configured to store graphics data, and one or more processors in communication with the memory, the one or more processors configured to output, for display, a plurality of test graphics images, receive input indicative of a perception of a user of the computing device of at least one test graphics image from the plurality of test graphics images, determine at least one parameter modification value and generate a corrected graphics image based at least in part on the at least one parameter modification value.Type: GrantFiled: December 18, 2014Date of Patent: June 20, 2017Assignee: QUALCOMM IncorporatedInventors: Christopher Paul Frascati, Avinash Seetharamaiah, Murat Balci
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Publication number: 20170161863Abstract: This disclosure is directed to graphics data storage. A graphics processing unit (GPU) may determine pixels of a tile for which the GPU generated graphics data during the rendering of the tile. The GPU may store the generated graphics data in a local memory, and use the information of the pixels of the tile for which the GPU generated graphics data to limit the amount of graphics data stored in the local memory that the GPU is to write to an external memory.Type: ApplicationFiled: December 3, 2015Publication date: June 8, 2017Inventors: Siddhartha Baral, Avinash Seetharamaiah, Christopher Paul Frascati
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Patent number: 9547930Abstract: This disclosure presents techniques and structures for determining a rendering mode (e.g., a binning rendering mode and a direct rendering mode) as well as techniques and structures for switching between such rendering modes. Rendering mode may be determined by analyzing rendering characteristics. Rendering mode may also be determined by tracking overdraw in a bin. The rendering mode may be switched from a binning rendering mode to a direct rendering mode by patching commands that use graphics memory addresses to use system memory addresses. Patching may be handled by a CPU or by a second write command buffer executable by a GPU.Type: GrantFiled: July 19, 2012Date of Patent: January 17, 2017Assignee: QUALCOMM IncorporatedInventors: Avinash Seetharamaiah, Christopher Paul Frascati
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Patent number: 9530245Abstract: This disclosure describes techniques for packing multiple shader programs of a common shader program type onto a graphics processing unit (GPU). The techniques may include, for example, causing a plurality of shader programs of a common shader program type to be loaded into an on-chip shader program instruction memory of a graphics processor such that each shader program in the plurality of shader programs resides in the on-chip shader program instruction memory at a common point in time. In addition, various techniques for evicting shader programs from an on-chip shader program instruction memory are described.Type: GrantFiled: December 7, 2012Date of Patent: December 27, 2016Assignee: QUALCOMM IncorporatedInventors: Christopher Paul Frascati, Avinash Seetharamaiah, Joseph Blankenship
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Publication number: 20160364901Abstract: A method and apparatus for ray tracing may include a method, manufacture and apparatus for ray tracing that may include dividing a render target into a plurality of bins. Next, a visibility pass is performed using ray tracing to generate a visibility stream such that the visibility stream indicates, for each bin of the plurality of bins, which primitives are visible in the bin. Then, for at least one bin of the plurality of bins, each primitive in the bin that is indicated in the visibility stream as being visible in the bin is rendered.Type: ApplicationFiled: June 12, 2015Publication date: December 15, 2016Inventors: Murat Balci, Christopher Paul Frascati, Juraj Obert, Hitendra Mohan Gangani, Avinash Seetharamaiah
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Patent number: 9483861Abstract: This disclosure describes techniques for using bounding regions to perform tile-based rendering with a graphics processing unit (GPU) that supports an on-chip, tessellation-enabled graphics rendering pipeline. Instead of generating binning data based on rasterized versions of the actual primitives to be rendered, the techniques of this disclosure may generate binning data based on a bounding region that encompasses one or more of the primitives to be rendered. Moreover, the binning data may be generated based on data that is generated by at least one tessellation processing stage of an on-chip, tessellation-enabled graphics rendering pipeline that is implemented by the GPU. The techniques of this disclosure may, in some examples, be used to improve the performance of an on-chip, tessellation-enabled GPU when performing tile-based rendering without sacrificing the quality of the resulting rendered image.Type: GrantFiled: March 15, 2013Date of Patent: November 1, 2016Assignee: QUALCOMM IncorporatedInventors: Christopher Paul Frascati, Avinash Seetharamaiah, Andrew Evan Gruber
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Patent number: 9449410Abstract: This disclosure describes techniques for supporting intra-frame timestamps in a graphics system that performs tile-based rendering. The techniques for supporting intra-frame timestamps may involve generating a timestamp value that is indicative of a point in time based on a plurality of per-bin timestamp values that are generated by a graphics processing unit (GPU) while performing tile-based rendering for a graphics frame. The timestamp value may be a function of at least two of the plurality of per-bin timestamp values. The timestamp value may be generated by a central processing unit (CPU), the GPU, another processor, or any combination thereof. By using per-bin timestamp values to generate timestamp values for intra-frame timestamp requests, intra-frame timestamps may be supported by a graphics system that performs tile-based rendering.Type: GrantFiled: October 2, 2013Date of Patent: September 20, 2016Assignee: QUALCOMM IncorporatedInventors: Christopher Paul Frascati, Hitendra Mohan Gangani, Avinash Seetharamaiah
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Patent number: 9384522Abstract: In general, techniques are described for analyzing a command stream that configures a graphics processing unit (GPU) to render one or more render targets. A device comprising a processor may perform the techniques. The processor may be configured to analyze the command stream to determine a representation of the one or more render targets defined by the command stream. The processor may also be configured to, based on the representation of the render targets, and identify one or more rendering inefficiencies that will occur upon execution of the command stream by the GPU. The processor may also be configured to re-order one or more commands in the command stream so as to reduce the identified rendering inefficiencies that will occur upon execution of the command stream by the GPU.Type: GrantFiled: February 25, 2013Date of Patent: July 5, 2016Assignee: QUALCOMM IncorporatedInventors: Christopher Paul Frascati, Avinash Seetharamaiah