Abstract: A system and method that can be utilized to implement voltage adjustment (e.g., for an integrated circuit). In one embodiment, the system comprises a frequency generator that provides a clock signal having a frequency that varies based on an operating voltage. The system also includes a controller that provides a control signal to adjust the operating voltage based on adjustments to the frequency of the clock signal.

Abstract: A method for calibrating a voltage controlled oscillator (VCO) comprising applying a plurality of known voltages to the input of a VCO, monitoring, for each of the voltages, an output count from the VCO over a set interval, and storing the output counts for each voltage. Also disclosed is a system for calibrating a voltage controlled oscillator (VCO) comprising a plurality of known voltages, wherein the known voltage are connectable to the VCO, and a controller coupled to the output of the VCO, wherein the controller maintains a calibration table of VCO output counts for selected voltage inputs.

Abstract: An apparatus comprising an integrated circuit on a VLSI die, and an embedded micro-controller constructed on the VLSI die, the micro-controller adapted to monitor and control the VLSI environment to optimize the integrated circuit operation. Another embodiment of the invention is directed to a method for monitoring and controlling an integrated circuit comprising providing an embedded micro-controller on a same VLSI die as the integrated circuit, monitoring and controlling a VLSI environment of the integrated circuit with the embedded micro-controller.

Abstract: The present invention is directed to a system and method for measuring a current in an integrated circuit comprising measuring a first output count from a first voltage controlled oscillator (VCO) using a first measurement voltage, simultaneously measuring a second output count from a second VCO using a second measurement voltage, and calculating the current in the integrated circuit using a voltage proportional to a difference between the first and second output counts.

Abstract: A system and method for measuring integrated circuit processor power demand comprises calibrating one or more voltage controlled oscillators for use as ammeters, calibrating a calibration current source, wherein the calibration current source draws current through a inherent resistance, calibrating the inherent resistance, and interleaving said calibrations in time with calculating the processor power demand using a voltage that is measured across the inherent resistance.

Abstract: A high frequency infrared radiation source including a hermetically sealed chamber with a plasma generating gas therein, a pair of spaced electrodes in the chamber for creating a plasma therebetween, a window in the chamber, and a collimating lens made of infrared radiation transmissive material disposed between the pair of electrodes and the window.

Abstract: A method of rapidly detecting data errors includes generating a reference syndrome from data bits in a data word, the reference syndrome having at least a first portion and a second portion, generating a partial error code from the data bits and the first portion of the reference syndrome, and initiating an error recovery procedure if the partial error code contains any true values.

Abstract: A method of rapidly detecting data errors includes generating a reference syndrome from data bits in a data word, the reference syndrome having at least a first portion and a second portion, generating a partial error code from the data bits and the first portion of the reference syndrome, and initiating an error recovery procedure if the partial error code contains any true values.

Abstract: A method is provided for the preparation of polycarbonates by the reaction of a diaryl carbonate, such as DPC and a dihydric phenol, such as BPA. The method utilizes the steps of successively processing the diaryl carbonate and the dihydric phenol in a melt in a first reaction stage, a second reaction stage and at least a first polymerization stage, and shifts the processing conditions such that the desired low viscosity/high end-cap product is obtained. This is achieved by having the ratio of diaryl carbonate to dihydric phenol in the melt prior to the first reaction stage greater than 1.08; and by controlling the temperature and residence time in the first polymerization stage to provide a polycarbonate product having a melt flow rate at 250° C. of greater than 10 g/min and an end-cap level of at least 90%. The method of the invention can be used in a linear manufacturing process, in which there is one product produced.

Abstract: A method and apparatus are provided for sensing and temporarily latching data signals from memory cells. According to one embodiment, data signals are sensed from memory cells and temporarily latched on an output signal. During a first phase of a clock cycle, multiple input bit-lines are precharged. Subsequently, a discharged input bit-line is sensed during a second phase of the clock cycle. Responsive to the sensing step, the output signal is set to a first state and maintained for at least one clock cycle. According to another embodiment, a multiple input bit-line detecting circuit includes multiple input bit-lines, precharge logic, and output logic. The multiple input bit-lines are configured to be coupled to a bit-line hierarchy of a memory device. The precharge logic is coupled to each of the input bit-lines and is configured to precharge each of the input bit-lines during a first phase of a clock cycle.