Abstract: Embodiments of systems and methods for rules based assessment of endovascular coil stability are disclosed. These systems and methods may assess images from a patient taken at a first time, such as a time of initial coil placement or thereafter, and at one or more second times, using a set of rules. Based on this assessment, a predictive recurrence indicator predictive of recurrence of the coil in the patient may be determined and presented to a user of the system (such as a doctor or other clinician). This predictive recurrence indicator can then be utilized to determine if further procedures should be undertaken to diagnose or treat the patient.

Abstract: This invention relates generally to methods for localization and visualization of implanted electrodes and penetrating probes in the brain in 3D space with consideration of functional brain anatomy. Particularly, this invention relates to precise and sophisticated methods of localizing and visualizing implanted electrodes to the cortical surface and/or topological volumes of a patient's brain using 3D modeling, and more particularly to methods of accurately mapping implanted electrodes to the cortical topology and/or associated topological volumes of a patient's brain, such as, for example, by utilizing recursive grid partitioning on a manipulable virtual replicate of a patient's brain. This invention further relates to methods of surgical intervention utilizing accurate cortical surface modeling and/or topological volume modeling of a patient's brain for targeted placement of electrodes and/or utilization thereof for surgical intervention in the placement of catheters or other probes into it.

Abstract: An inrush current limiting circuit includes a power FET switch connected between power source and load and a control circuit. The power FET switch includes one or more parallel-connected power FETs, each having low individual conductive resistances. The control circuit, connected between the power inputs and the gate of power FET switch, includes a voltage supply for providing sufficient voltage to turn the power FET switch on and a time constant circuit for controlling the rate at which the power FET means is turned on. With the voltage supply connected to an optional enable terminal, a DC enable signal can control powering of the load. A second time constant circuit controls the rate of power down.