Abstract: A semiconductor package includes a leadframe, a first transistor chip connected to a first island of the leadframe in a drain-down configuration, and a second transistor chip connected to a second island of the leadframe in the same drain-down configuration as the first transistor chip. The first and the second islands of the leadframe are mutually electrically isolated from one another. The first island includes an extension which extends beyond a perimeter of the first transistor chip in a direction towards the second island and overlaps the second transistor chip. The first transistor chip and the second transistor chip are electrically interconnected with one another via the extension of the first island and a first electric connection element electrically connecting the extension to the second transistor chip to form a half bridge circuit.

Abstract: A semiconductor package includes a leadframe, a first transistor chip connected to a first island of the leadframe in a drain-down configuration, and a second transistor chip connected to a second island of the leadframe in the same drain-down configuration as the first transistor chip. The first and the second islands of the leadframe are mutually electrically isolated from one another. The first island includes an extension which extends beyond a perimeter of the first transistor chip in a direction towards the second island and overlaps the second transistor chip. The first transistor chip and the second transistor chip are electrically interconnected with one another via the extension of the first island and a first electric connection element electrically connecting the extension to the second transistor chip to form a half bridge circuit.

Abstract: A package comprising an at least partially electrically conductive chip carrier, a first transistor chip comprising a first connection terminal, a second connection terminal and a control terminal, and a second transistor chip comprising a first connection terminal, a second connection terminal and a control terminal, wherein the first transistor chip and the second transistor chip are connected to form a half bridge, and wherein the second connection terminal of the first transistor chip is electrically coupled with the first connection terminal of the second transistor chip by a bar section of the chip carrier extending between an exterior edge region of the first transistor chip and an exterior edge region of the second transistor chip and maintaining a gap laterally spacing the first transistor chip with regard to the second transistor chip.

Abstract: An instrument panel system. The instrument panel system provides an aesthetically appealing instrument panel by including a number of concealed switches. The switches are concealed such that an area proximate the switch on the 5 surface of the instrument panel appears to be uninterrupted by the switch. In operation, the position of the switches is revealed by illuminating a switch display.

Abstract: A vehicle remote keyless entry (RKE) system and a method of controlling the operation of at least one vehicle device using voice commands includes a remote control unit transmitting a control signal and a receiver module mounted to the vehicle for receiving the control signal. The remote control unit includes a microphone for receiving a voice command and a processor connected to the microphone for recognizing the voice command and generating a control signal. The receiver module receives the control signal transmitted from the remote control unit and generates a control signal through a data bus connected to the at least one vehicle device to control the operation of the at least one vehicle device.